Commit c48f2295 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (38 commits)
  MIPS: Sibyte: Fix locking in set_irq_affinity
  MIPS: Use force_sig when handling address errors.
  MIPS: Cavium: Add struct clocksource * argument to octeon_cvmcount_read()
  MIPS: Rewrite <asm/div64.h> to work with gcc 4.4.0.
  MIPS: Fix highmem.
  MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware.
  MIPS: MSP71xx: Remove the RAMROOT functions
  MIPS: Use -mno-check-zero-division
  MIPS: Set compiler options only after the compiler prefix has ben set.
  MIPS: IP27: Get rid of #ident.  Gcc 4.4.0 doesn't like it.
  MIPS: uaccess: Switch lock annotations to might_fault().
  MIPS: MSP71xx: Resolve use of non-existent GPIO routines in msp71xx reset
  MIPS: MSP71xx: Resolve multiple definition of plat_timer_setup
  MIPS: Make uaccess.h slightly more sparse friendly.
  MIPS: Make access_ok() sideeffect proof.
  MIPS: IP27: Fix clash with NMI_OFFSET from hardirq.h
  MIPS: Alchemy: Timer build fix
  MIPS: Kconfig: Delete duplicate definition of RWSEM_GENERIC_SPINLOCK.
  MIPS: Cavium: Add support for 8k and 32k page sizes.
  MIPS: TXx9: Fix possible overflow in clock calculations
  ...
parents 5732c468 5d81b83d

arch/mips/Kconfig

+12 −8
Original line number Diff line number Diff line
@@ -1411,13 +1411,12 @@ config PAGE_SIZE_4KB 


config PAGE_SIZE_8KB

	bool "8kB"

	depends on EXPERIMENTAL && CPU_R8000

	depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON

	help

	  Using 8kB page size will result in higher performance kernel at

	  the price of higher memory consumption.  This option is available

	  only on the R8000 processor.  Not that at the time of this writing

	  this option is still high experimental; there are also issues with

	  compatibility of user applications.

	  only on R8000 and cnMIPS processors.  Note that you will need a

	  suitable Linux distribution to support this.



config PAGE_SIZE_16KB

	bool "16kB"
@@ -1428,6 +1427,15 @@ config PAGE_SIZE_16KB 
	  all non-R3000 family processors.  Note that you will need a suitable

	  Linux distribution to support this.



config PAGE_SIZE_32KB

	bool "32kB"

	depends on CPU_CAVIUM_OCTEON

	help

	  Using 32kB page size will result in higher performance kernel at

	  the price of higher memory consumption.  This option is available

	  only on cnMIPS cores.  Note that you will need a suitable Linux

	  distribution to support this.



config PAGE_SIZE_64KB

	bool "64kB"

	depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
@@ -1958,10 +1966,6 @@ config SECCOMP 


endmenu



config RWSEM_GENERIC_SPINLOCK

	bool

	default y



config LOCKDEP_SUPPORT

	bool

	default y

arch/mips/Makefile

+3 −2
Original line number Diff line number Diff line
@@ -14,8 +14,6 @@ 


KBUILD_DEFCONFIG := ip22_defconfig



cflags-y := -ffunction-sections



#

# Select the object file format to substitute into the linker script.

#
@@ -50,6 +48,9 @@ ifneq ($(SUBARCH),$(ARCH)) 
  endif

endif



cflags-y := -ffunction-sections

cflags-y += $(call cc-option, -mno-check-zero-division)



ifdef CONFIG_32BIT

ld-emul			= $(32bit-emul)

vmlinux-32		= vmlinux

arch/mips/alchemy/common/time.c

+1 −1
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@ 


extern int allow_au1k_wait; /* default off for CP0 Counter */



static cycle_t au1x_counter1_read(void)

static cycle_t au1x_counter1_read(struct clocksource *cs)

{

	return au_readl(SYS_RTCREAD);

}

arch/mips/cavium-octeon/csrc-octeon.c

+1 −1
Original line number Diff line number Diff line
@@ -38,7 +38,7 @@ void octeon_init_cvmcount(void) 
	local_irq_restore(flags);

}



static cycle_t octeon_cvmcount_read(void)

static cycle_t octeon_cvmcount_read(struct clocksource *cs)

{

	return read_c0_cvmcount();

}

arch/mips/include/asm/bitops.h

+2 −2
Original line number Diff line number Diff line
@@ -567,7 +567,7 @@ static inline unsigned long __fls(unsigned long word) 
	int num;



	if (BITS_PER_LONG == 32 &&

	    __builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) {

	    __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) {

		__asm__(

		"	.set	push					\n"

		"	.set	mips32					\n"
@@ -644,7 +644,7 @@ static inline int fls(int x) 
{

	int r;



	if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) {

	if (__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) {

		__asm__("clz %0, %1" : "=r" (x) : "r" (x));



		return 32 - x;

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