Commit c4726338 authored by Yunsheng Lin's avatar Yunsheng Lin Committed by David S. Miller
Browse files

net: hns3: Fix typo error for feild in hclge_tm 



This patch fixes a typo error for feild, which should be field.

Fixes: 84844054 ("net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver")
Signed-off-by: default avatarYunsheng Lin <linyunsheng@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent d602a525

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c

+10 −10
Original line number Original line Diff line number Diff line
@@ -280,11 +280,11 @@ static int hclge_tm_pg_shapping_cfg(struct hclge_dev *hdev, 




	shap_cfg_cmd->pg_id = pg_id;

	shap_cfg_cmd->pg_id = pg_id;





	hclge_tm_set_feild(shap_cfg_cmd->pg_shapping_para, IR_B, ir_b);

	hclge_tm_set_field(shap_cfg_cmd->pg_shapping_para, IR_B, ir_b);

	hclge_tm_set_feild(shap_cfg_cmd->pg_shapping_para, IR_U, ir_u);

	hclge_tm_set_field(shap_cfg_cmd->pg_shapping_para, IR_U, ir_u);

	hclge_tm_set_feild(shap_cfg_cmd->pg_shapping_para, IR_S, ir_s);

	hclge_tm_set_field(shap_cfg_cmd->pg_shapping_para, IR_S, ir_s);

	hclge_tm_set_feild(shap_cfg_cmd->pg_shapping_para, BS_B, bs_b);

	hclge_tm_set_field(shap_cfg_cmd->pg_shapping_para, BS_B, bs_b);

	hclge_tm_set_feild(shap_cfg_cmd->pg_shapping_para, BS_S, bs_s);

	hclge_tm_set_field(shap_cfg_cmd->pg_shapping_para, BS_S, bs_s);





	return hclge_cmd_send(&hdev->hw, &desc, 1);

	return hclge_cmd_send(&hdev->hw, &desc, 1);

}

}
@@ -307,11 +307,11 @@ static int hclge_tm_pri_shapping_cfg(struct hclge_dev *hdev, 




	shap_cfg_cmd->pri_id = pri_id;

	shap_cfg_cmd->pri_id = pri_id;





	hclge_tm_set_feild(shap_cfg_cmd->pri_shapping_para, IR_B, ir_b);

	hclge_tm_set_field(shap_cfg_cmd->pri_shapping_para, IR_B, ir_b);

	hclge_tm_set_feild(shap_cfg_cmd->pri_shapping_para, IR_U, ir_u);

	hclge_tm_set_field(shap_cfg_cmd->pri_shapping_para, IR_U, ir_u);

	hclge_tm_set_feild(shap_cfg_cmd->pri_shapping_para, IR_S, ir_s);

	hclge_tm_set_field(shap_cfg_cmd->pri_shapping_para, IR_S, ir_s);

	hclge_tm_set_feild(shap_cfg_cmd->pri_shapping_para, BS_B, bs_b);

	hclge_tm_set_field(shap_cfg_cmd->pri_shapping_para, BS_B, bs_b);

	hclge_tm_set_feild(shap_cfg_cmd->pri_shapping_para, BS_S, bs_s);

	hclge_tm_set_field(shap_cfg_cmd->pri_shapping_para, BS_S, bs_s);





	return hclge_cmd_send(&hdev->hw, &desc, 1);

	return hclge_cmd_send(&hdev->hw, &desc, 1);

}

}

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h

+2 −2
Original line number Original line Diff line number Diff line
@@ -94,10 +94,10 @@ struct hclge_bp_to_qs_map_cmd { 
	u32 rsvd1;

	u32 rsvd1;

};

};





#define hclge_tm_set_feild(dest, string, val) \

#define hclge_tm_set_field(dest, string, val) \

			hnae_set_field((dest), (HCLGE_TM_SHAP_##string##_MSK), \

			hnae_set_field((dest), (HCLGE_TM_SHAP_##string##_MSK), \

				       (HCLGE_TM_SHAP_##string##_LSH), val)

				       (HCLGE_TM_SHAP_##string##_LSH), val)

#define hclge_tm_get_feild(src, string) \

#define hclge_tm_get_field(src, string) \

			hnae_get_field((src), (HCLGE_TM_SHAP_##string##_MSK), \

			hnae_get_field((src), (HCLGE_TM_SHAP_##string##_MSK), \

				       (HCLGE_TM_SHAP_##string##_LSH))

				       (HCLGE_TM_SHAP_##string##_LSH))

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