Merge tag 'v5.8' into drm-next (c44264f9) · Commits · 戴 / test

.mailmap

+3 −0

Original line number	Diff line number	Diff line
		@@ -198,6 +198,9 @@ Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com>
		Mayuresh Janorkar <mayur@ti.com>
		Michael Buesch <m@bues.ch>
		Michel Dänzer <michel@tungstengraphics.com>
		Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il>
		Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com>
		Mike Rapoport <rppt@kernel.org> <rppt@linux.ibm.com>
		Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>
		Miquel Raynal <miquel.raynal@bootlin.com> <miquel.raynal@free-electrons.com>
		Mitesh shah <mshah@teja.com>

+10 −1

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		@@ -16,7 +16,16 @@ Description: Allow the root user to disable/enable in runtime the clock
		gating mechanism in Gaudi. Due to how Gaudi is built, the
		clock gating needs to be disabled in order to access the
		registers of the TPC and MME engines. This is sometimes needed
		during debug by the user and hence the user needs this option
		during debug by the user and hence the user needs this option.
		The user can supply a bitmask value, each bit represents
		a different engine to disable/enable its clock gating feature.
		The bitmask is composed of 20 bits:
		0 - 7 : DMA channels
		8 - 11 : MME engines
		12 - 19 : TPC engines
		The bit's location of a specific engine can be determined
		using (1 << GAUDI_ENGINE_ID_). GAUDI_ENGINE_ID_ values
		are defined in uapi habanalabs.h file in enum gaudi_engine_id

		What: /sys/kernel/debug/habanalabs/hl<n>/command_buffers
		Date: Jan 2019

+3 −0

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		@@ -47,6 +47,9 @@ properties:
		$ref: /schemas/types.yaml#/definitions/phandle-array
		description: Phandle to the device SRAM

		iommus:
		maxItems: 1

		memory-region:
		description:
		CMA pool to use for buffers allocation instead of the default

+13 −4

Original line number	Diff line number	Diff line
		@@ -378,6 +378,8 @@ examples:
		- \|
		sound {
		compatible = "simple-audio-card";
		#address-cells = <1>;
		#size-cells = <0>;

		simple-audio-card,name = "rsnd-ak4643";
		simple-audio-card,format = "left_j";
		@@ -391,10 +393,12 @@ examples:
		"ak4642 Playback", "DAI1 Playback";

		dpcmcpu: simple-audio-card,cpu@0 {
		reg = <0>;
		sound-dai = <&rcar_sound 0>;
		};

		simple-audio-card,cpu@1 {
		reg = <1>;
		sound-dai = <&rcar_sound 1>;
		};

		@@ -418,6 +422,8 @@ examples:
		- \|
		sound {
		compatible = "simple-audio-card";
		#address-cells = <1>;
		#size-cells = <0>;

		simple-audio-card,routing =
		"pcm3168a Playback", "DAI1 Playback",
		@@ -426,6 +432,7 @@ examples:
		"pcm3168a Playback", "DAI4 Playback";

		simple-audio-card,dai-link@0 {
		reg = <0>;
		format = "left_j";
		bitclock-master = <&sndcpu0>;
		frame-master = <&sndcpu0>;
		@@ -439,22 +446,23 @@ examples:
		};

		simple-audio-card,dai-link@1 {
		reg = <1>;
		format = "i2s";
		bitclock-master = <&sndcpu1>;
		frame-master = <&sndcpu1>;

		convert-channels = <8>; /* TDM Split */

		sndcpu1: cpu@0 {
		sndcpu1: cpu0 {
		sound-dai = <&rcar_sound 1>;
		};
		cpu@1 {
		cpu1 {
		sound-dai = <&rcar_sound 2>;
		};
		cpu@2 {
		cpu2 {
		sound-dai = <&rcar_sound 3>;
		};
		cpu@3 {
		cpu3 {
		sound-dai = <&rcar_sound 4>;
		};
		codec {
		@@ -466,6 +474,7 @@ examples:
		};

		simple-audio-card,dai-link@2 {
		reg = <2>;
		format = "i2s";
		bitclock-master = <&sndcpu2>;
		frame-master = <&sndcpu2>;

+12 −0

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		@@ -23,6 +23,7 @@ PTP hardware clock infrastructure for Linux
		+ Ancillary clock features
		- Time stamp external events
		- Period output signals configurable from user space
		- Low Pass Filter (LPF) access from user space
		- Synchronization of the Linux system time via the PPS subsystem

		PTP hardware clock kernel API
		@@ -94,3 +95,14 @@ Supported hardware

		- Auxiliary Slave/Master Mode Snapshot (optional interrupt)
		- Target Time (optional interrupt)

		* Renesas (IDT) ClockMatrix™

		- Up to 4 independent PHC channels
		- Integrated low pass filter (LPF), access via .adjPhase (compliant to ITU-T G.8273.2)
		- Programmable output periodic signals
		- Programmable inputs can time stamp external triggers
		- Driver and/or hardware configuration through firmware (idtcm.bin)
		- LPF settings (bandwidth, phase limiting, automatic holdover, physical layer assist (per ITU-T G.8273.2))
		- Programmable output PTP clocks, any frequency up to 1GHz (to other PHY/MAC time stampers, refclk to ASSPs/SoCs/FPGAs)
		- Lock to GNSS input, automatic switching between GNSS and user-space PHC control (optional)