Commit c416e5aa authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
Browse files

x86/perf/rapl: Reorder model numbers 



Re-order the model array to match the order in events/intel/core.c,
to easier spot gaps and such.

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent dcee75b3

arch/x86/events/intel/rapl.c

+9 −4
Original line number Diff line number Diff line
@@ -787,17 +787,22 @@ static const struct intel_rapl_init_fun skl_rapl_init __initconst = { 


static const struct x86_cpu_id rapl_cpu_match[] __initconst = {

	X86_RAPL_MODEL_MATCH(42, snb_rapl_init),	/* Sandy Bridge */

	X86_RAPL_MODEL_MATCH(45, snbep_rapl_init),	/* Sandy Bridge-EP */



	X86_RAPL_MODEL_MATCH(58, snb_rapl_init),	/* Ivy Bridge */

	X86_RAPL_MODEL_MATCH(63, hsx_rapl_init),	/* Haswell-Server */

	X86_RAPL_MODEL_MATCH(79, hsx_rapl_init),	/* Broadwell-Server */

	X86_RAPL_MODEL_MATCH(62, snbep_rapl_init),	/* IvyTown */



	X86_RAPL_MODEL_MATCH(60, hsw_rapl_init),	/* Haswell */

	X86_RAPL_MODEL_MATCH(63, hsx_rapl_init),	/* Haswell-Server */

	X86_RAPL_MODEL_MATCH(69, hsw_rapl_init),	/* Haswell-Celeron */

	X86_RAPL_MODEL_MATCH(70, hsw_rapl_init),	/* Haswell GT3e */



	X86_RAPL_MODEL_MATCH(61, hsw_rapl_init),	/* Broadwell */

	X86_RAPL_MODEL_MATCH(71, hsw_rapl_init),	/* Broadwell-H */

	X86_RAPL_MODEL_MATCH(45, snbep_rapl_init),	/* Sandy Bridge-EP */

	X86_RAPL_MODEL_MATCH(62, snbep_rapl_init),	/* IvyTown */

	X86_RAPL_MODEL_MATCH(79, hsx_rapl_init),	/* Broadwell-Server */



	X86_RAPL_MODEL_MATCH(87, knl_rapl_init),	/* Knights Landing */



	X86_RAPL_MODEL_MATCH(78, skl_rapl_init),	/* Skylake */

	X86_RAPL_MODEL_MATCH(94, skl_rapl_init),	/* Skylake H/S */

	{},

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