arm64: dts: imx8mq: properly describe IRQ hierarchy (c412123f) · Commits · 戴 / test

The GPCv2 sits between most of the peripherals and the GIC and functions as a wakeup controller for the CPU cores. Signed-off-by:

arch/arm64/boot/dts/freescale/imx8mq.dtsi

+4 −2

Original line number	Diff line number	Diff line
		@@ -11,8 +11,7 @@
		#include "imx8mq-pinfunc.h"

		/ {
		/* This should really be the GPC, but we need a driver for this first */
		interrupt-parent = <&gic>;
		interrupt-parent = <&gpc>;

		#address-cells = <2>;
		#size-cells = <2>;
		@@ -257,6 +256,9 @@
		gpc: gpc@303a0000 {
		compatible = "fsl,imx8mq-gpc";
		reg = <0x303a0000 0x10000>;
		interrupt-parent = <&gic>;
		interrupt-controller;
		#interrupt-cells = <3>;

		pgc {
		#address-cells = <1>;