Commit c3f5b8fd authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Ludovic Desroches
Browse files

ARM: at91: pm: introduce at91_soc_pm structure 



To have per SoC PM information add a new structure which embed
a member of type struct at91_pm_data. This will allow easy addition
of new information without contaminate struct at91_pm_data that is
passed to the last phase suspend function (at91_suspend_sram_fn).

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: default avatarLudovic Desroches <ludovic.desroches@microchip.com>
parent 9e98c678

arch/arm/mach-at91/pm.c

+62 −56
Original line number Diff line number Diff line
@@ -39,6 +39,17 @@ extern void at91_pinctrl_gpio_suspend(void); 
extern void at91_pinctrl_gpio_resume(void);

#endif



struct at91_soc_pm {

	struct at91_pm_data data;

};



static struct at91_soc_pm soc_pm = {

	.data = {

		.standby_mode = AT91_PM_STANDBY,

		.suspend_mode = AT91_PM_ULP0,

	},

};



static const match_table_t pm_modes __initconst = {

	{ AT91_PM_STANDBY, "standby" },

	{ AT91_PM_ULP0, "ulp0" },
@@ -47,16 +58,11 @@ static const match_table_t pm_modes __initconst = { 
	{ -1, NULL },

};



static struct at91_pm_data pm_data = {

	.standby_mode = AT91_PM_STANDBY,

	.suspend_mode = AT91_PM_ULP0,

};



#define at91_ramc_read(id, field) \

	__raw_readl(pm_data.ramc[id] + field)

	__raw_readl(soc_pm.data.ramc[id] + field)



#define at91_ramc_write(id, field, value) \

	__raw_writel(value, pm_data.ramc[id] + field)

	__raw_writel(value, soc_pm.data.ramc[id] + field)



static int at91_pm_valid_state(suspend_state_t state)

{
@@ -116,21 +122,21 @@ static int at91_pm_config_ws(unsigned int pm_mode, bool set) 
	if (pm_mode != AT91_PM_ULP1)

		return 0;



	if (!pm_data.pmc || !pm_data.shdwc)

	if (!soc_pm.data.pmc || !soc_pm.data.shdwc)

		return -EPERM;



	if (!set) {

		writel(mode, pm_data.pmc + AT91_PMC_FSMR);

		writel(mode, soc_pm.data.pmc + AT91_PMC_FSMR);

		return 0;

	}



	/* SHDWC.WUIR */

	val = readl(pm_data.shdwc + 0x0c);

	val = readl(soc_pm.data.shdwc + 0x0c);

	mode |= (val & 0x3ff);

	polarity |= ((val >> 16) & 0x3ff);



	/* SHDWC.MR */

	val = readl(pm_data.shdwc + 0x04);

	val = readl(soc_pm.data.shdwc + 0x04);



	/* Loop through defined wakeup sources. */

	for_each_matching_node_and_match(np, sama5d2_ws_ids, &match) {
@@ -155,8 +161,8 @@ put_device: 
	}



	if (mode) {

		writel(mode, pm_data.pmc + AT91_PMC_FSMR);

		writel(polarity, pm_data.pmc + AT91_PMC_FSPR);

		writel(mode, soc_pm.data.pmc + AT91_PMC_FSMR);

		writel(polarity, soc_pm.data.pmc + AT91_PMC_FSPR);

	} else {

		pr_err("AT91: PM: no ULP1 wakeup sources found!");

	}
@@ -171,18 +177,18 @@ static int at91_pm_begin(suspend_state_t state) 
{

	switch (state) {

	case PM_SUSPEND_MEM:

		pm_data.mode = pm_data.suspend_mode;

		soc_pm.data.mode = soc_pm.data.suspend_mode;

		break;



	case PM_SUSPEND_STANDBY:

		pm_data.mode = pm_data.standby_mode;

		soc_pm.data.mode = soc_pm.data.standby_mode;

		break;



	default:

		pm_data.mode = -1;

		soc_pm.data.mode = -1;

	}



	return at91_pm_config_ws(pm_data.mode, true);

	return at91_pm_config_ws(soc_pm.data.mode, true);

}



/*
@@ -194,10 +200,10 @@ static int at91_pm_verify_clocks(void) 
	unsigned long scsr;

	int i;



	scsr = readl(pm_data.pmc + AT91_PMC_SCSR);

	scsr = readl(soc_pm.data.pmc + AT91_PMC_SCSR);



	/* USB must not be using PLLB */

	if ((scsr & pm_data.uhp_udp_mask) != 0) {

	if ((scsr & soc_pm.data.uhp_udp_mask) != 0) {

		pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");

		return 0;

	}
@@ -208,7 +214,7 @@ static int at91_pm_verify_clocks(void) 


		if ((scsr & (AT91_PMC_PCK0 << i)) == 0)

			continue;

		css = readl(pm_data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;

		css = readl(soc_pm.data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;

		if (css != AT91_PMC_CSS_SLOW) {

			pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);

			return 0;
@@ -230,7 +236,7 @@ static int at91_pm_verify_clocks(void) 
 */

int at91_suspend_entering_slow_clock(void)

{

	return (pm_data.mode >= AT91_PM_ULP0);

	return (soc_pm.data.mode >= AT91_PM_ULP0);

}

EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
@@ -243,14 +249,14 @@ static int at91_suspend_finish(unsigned long val) 
	flush_cache_all();

	outer_disable();



	at91_suspend_sram_fn(&pm_data);

	at91_suspend_sram_fn(&soc_pm.data);



	return 0;

}



static void at91_pm_suspend(suspend_state_t state)

{

	if (pm_data.mode == AT91_PM_BACKUP) {

	if (soc_pm.data.mode == AT91_PM_BACKUP) {

		pm_bu->suspended = 1;



		cpu_suspend(0, at91_suspend_finish);
@@ -289,7 +295,7 @@ static int at91_pm_enter(suspend_state_t state) 
		/*

		 * Ensure that clocks are in a valid state.

		 */

		if (pm_data.mode >= AT91_PM_ULP0 &&

		if (soc_pm.data.mode >= AT91_PM_ULP0 &&

		    !at91_pm_verify_clocks())

			goto error;
@@ -318,7 +324,7 @@ error: 
 */

static void at91_pm_end(void)

{

	at91_pm_config_ws(pm_data.mode, false);

	at91_pm_config_ws(soc_pm.data.mode, false);

}
@@ -351,7 +357,7 @@ static void at91rm9200_standby(void) 
		"    str    %2, [%1, %3]\n\t"

		"    mcr    p15, 0, %0, c7, c0, 4\n\t"

		:

		: "r" (0), "r" (pm_data.ramc[0]),

		: "r" (0), "r" (soc_pm.data.ramc[0]),

		  "r" (1), "r" (AT91_MC_SDRAMC_SRR));

}
@@ -374,7 +380,7 @@ static void at91_ddr_standby(void) 
		at91_ramc_write(0, AT91_DDRSDRC_MDR, mdr);

	}



	if (pm_data.ramc[1]) {

	if (soc_pm.data.ramc[1]) {

		saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);

		lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;

		lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
@@ -392,14 +398,14 @@ static void at91_ddr_standby(void) 


	/* self-refresh mode now */

	at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);

	if (pm_data.ramc[1])

	if (soc_pm.data.ramc[1])

		at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);



	cpu_do_idle();



	at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr0);

	at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);

	if (pm_data.ramc[1]) {

	if (soc_pm.data.ramc[1]) {

		at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr1);

		at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);

	}
@@ -429,7 +435,7 @@ static void at91sam9_sdram_standby(void) 
	u32 lpr0, lpr1 = 0;

	u32 saved_lpr0, saved_lpr1 = 0;



	if (pm_data.ramc[1]) {

	if (soc_pm.data.ramc[1]) {

		saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);

		lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;

		lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
@@ -441,13 +447,13 @@ static void at91sam9_sdram_standby(void) 


	/* self-refresh mode now */

	at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);

	if (pm_data.ramc[1])

	if (soc_pm.data.ramc[1])

		at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);



	cpu_do_idle();



	at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);

	if (pm_data.ramc[1])

	if (soc_pm.data.ramc[1])

		at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);

}
@@ -480,14 +486,14 @@ static __init void at91_dt_ramc(void) 
	const struct ramc_info *ramc;



	for_each_matching_node_and_match(np, ramc_ids, &of_id) {

		pm_data.ramc[idx] = of_iomap(np, 0);

		if (!pm_data.ramc[idx])

		soc_pm.data.ramc[idx] = of_iomap(np, 0);

		if (!soc_pm.data.ramc[idx])

			panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);



		ramc = of_id->data;

		if (!standby)

			standby = ramc->idle;

		pm_data.memctrl = ramc->memctrl;

		soc_pm.data.memctrl = ramc->memctrl;



		idx++;

	}
@@ -509,12 +515,12 @@ static void at91rm9200_idle(void) 
	 * Disable the processor clock.  The processor will be automatically

	 * re-enabled by an interrupt or by a reset.

	 */

	writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);

	writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);

}



static void at91sam9_idle(void)

{

	writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);

	writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);

	cpu_do_idle();

}
@@ -566,8 +572,8 @@ static void __init at91_pm_sram_init(void) 


static bool __init at91_is_pm_mode_active(int pm_mode)

{

	return (pm_data.standby_mode == pm_mode ||

		pm_data.suspend_mode == pm_mode);

	return (soc_pm.data.standby_mode == pm_mode ||

		soc_pm.data.suspend_mode == pm_mode);

}



static int __init at91_pm_backup_init(void)
@@ -586,7 +592,7 @@ static int __init at91_pm_backup_init(void) 
		return ret;

	}



	pm_data.sfrbu = of_iomap(np, 0);

	soc_pm.data.sfrbu = of_iomap(np, 0);

	of_node_put(np);



	np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam");
@@ -620,8 +626,8 @@ static int __init at91_pm_backup_init(void) 
	return 0;



securam_fail:

	iounmap(pm_data.sfrbu);

	pm_data.sfrbu = NULL;

	iounmap(soc_pm.data.sfrbu);

	soc_pm.data.sfrbu = NULL;

	return ret;

}
@@ -630,10 +636,10 @@ static void __init at91_pm_use_default_mode(int pm_mode) 
	if (pm_mode != AT91_PM_ULP1 && pm_mode != AT91_PM_BACKUP)

		return;



	if (pm_data.standby_mode == pm_mode)

		pm_data.standby_mode = AT91_PM_ULP0;

	if (pm_data.suspend_mode == pm_mode)

		pm_data.suspend_mode = AT91_PM_ULP0;

	if (soc_pm.data.standby_mode == pm_mode)

		soc_pm.data.standby_mode = AT91_PM_ULP0;

	if (soc_pm.data.suspend_mode == pm_mode)

		soc_pm.data.suspend_mode = AT91_PM_ULP0;

}



static void __init at91_pm_modes_init(void)
@@ -651,7 +657,7 @@ static void __init at91_pm_modes_init(void) 
		goto ulp1_default;

	}



	pm_data.shdwc = of_iomap(np, 0);

	soc_pm.data.shdwc = of_iomap(np, 0);

	of_node_put(np);



	ret = at91_pm_backup_init();
@@ -665,8 +671,8 @@ static void __init at91_pm_modes_init(void) 
	return;



unmap:

	iounmap(pm_data.shdwc);

	pm_data.shdwc = NULL;

	iounmap(soc_pm.data.shdwc);

	soc_pm.data.shdwc = NULL;

ulp1_default:

	at91_pm_use_default_mode(AT91_PM_ULP1);

backup_default:
@@ -709,14 +715,14 @@ static void __init at91_pm_init(void (*pm_idle)(void)) 
		platform_device_register(&at91_cpuidle_device);



	pmc_np = of_find_matching_node_and_match(NULL, atmel_pmc_ids, &of_id);

	pm_data.pmc = of_iomap(pmc_np, 0);

	if (!pm_data.pmc) {

	soc_pm.data.pmc = of_iomap(pmc_np, 0);

	if (!soc_pm.data.pmc) {

		pr_err("AT91: PM not supported, PMC not found\n");

		return;

	}



	pmc = of_id->data;

	pm_data.uhp_udp_mask = pmc->uhp_udp_mask;

	soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;



	if (pm_idle)

		arm_pm_idle = pm_idle;
@@ -726,8 +732,8 @@ static void __init at91_pm_init(void (*pm_idle)(void)) 
	if (at91_suspend_sram_fn) {

		suspend_set_ops(&at91_pm_ops);

		pr_info("AT91: PM: standby: %s, suspend: %s\n",

			pm_modes[pm_data.standby_mode].pattern,

			pm_modes[pm_data.suspend_mode].pattern);

			pm_modes[soc_pm.data.standby_mode].pattern,

			pm_modes[soc_pm.data.suspend_mode].pattern);

	} else {

		pr_info("AT91: PM not supported, due to no SRAM allocated\n");

	}
@@ -793,8 +799,8 @@ static int __init at91_pm_modes_select(char *str) 
	if (suspend < 0)

		return 0;



	pm_data.standby_mode = standby;

	pm_data.suspend_mode = suspend;

	soc_pm.data.standby_mode = standby;

	soc_pm.data.suspend_mode = suspend;



	return 0;

}

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