Commit c384afe3 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Finalize Wa_1408961008:icl 



The icl wm1+ underrun w/a has been added to the spec. It changed
slightly from the previous incarnation by requiring that we mirror
the lines watermark and the ignore lines bit from WM0 into WM1.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190228173639.18422-1-ville.syrjala@linux.intel.com


Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Tested-by: default avatarClint Taylor <Clinton.A.Taylor@intel.com>
parent 3ef71149

drivers/gpu/drm/i915/intel_pm.c

+6 −2
Original line number Diff line number Diff line
@@ -4467,11 +4467,15 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, 
			wm = &cstate->wm.skl.optimal.planes[plane_id];

			memset(&wm->wm[level], 0, sizeof(wm->wm[level]));



			/* W/A for underruns with WM1+ disabled */

			/*

			 * Wa_1408961008:icl

			 * Underruns with WM1+ disabled

			 */

			if (IS_ICELAKE(dev_priv) &&

			    level == 1 && wm->wm[0].plane_en) {

				wm->wm[level].plane_res_b = wm->wm[0].plane_res_b;

				wm->wm[level].ignore_lines = true;

				wm->wm[level].plane_res_l = wm->wm[0].plane_res_l;

				wm->wm[level].ignore_lines = wm->wm[0].ignore_lines;

			}

		}

	}

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