Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6 (c3823c47) · Commits · 戴 / test

arch/avr32/Kconfig

+5 −0

Original line number	Diff line number	Diff line
		@@ -47,6 +47,9 @@ config RWSEM_GENERIC_SPINLOCK
		config GENERIC_TIME
		def_bool y

		config GENERIC_CLOCKEVENTS
		def_bool y

		config RWSEM_XCHGADD_ALGORITHM
		def_bool n

		@@ -70,6 +73,8 @@ source "init/Kconfig"

		menu "System Type and features"

		source "kernel/time/Kconfig"

		config SUBARCH_AVR32B
		bool
		config MMU

arch/avr32/kernel/entry-avr32b.S

+0 −20

Original line number	Diff line number	Diff line
		@@ -741,26 +741,6 @@ irq_level\level:

		.section .irq.text,"ax",@progbits

		.global cpu_idle_sleep
		cpu_idle_sleep:
		mask_interrupts
		get_thread_info r8
		ld.w r9, r8[TI_flags]
		bld r9, TIF_NEED_RESCHED
		brcs cpu_idle_enable_int_and_exit
		sbr r9, TIF_CPU_GOING_TO_SLEEP
		st.w r8[TI_flags], r9
		unmask_interrupts
		sleep 0
		cpu_idle_skip_sleep:
		mask_interrupts
		ld.w r9, r8[TI_flags]
		cbr r9, TIF_CPU_GOING_TO_SLEEP
		st.w r8[TI_flags], r9
		cpu_idle_enable_int_and_exit:
		unmask_interrupts
		retal r12

		.global irq_level0
		.global irq_level1
		.global irq_level2

arch/avr32/kernel/process.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -18,11 +18,11 @@
		#include <asm/sysreg.h>
		#include <asm/ocd.h>

		#include <asm/arch/pm.h>

		void (*pm_power_off)(void) = NULL;
		EXPORT_SYMBOL(pm_power_off);

		extern void cpu_idle_sleep(void);

		/*
		* This file handles the architecture-dependent parts of process handling..
		*/
		@@ -54,6 +54,8 @@ void machine_halt(void)

		void machine_power_off(void)
		{
		if (pm_power_off)
		pm_power_off();
		}

		void machine_restart(char *cmd)

arch/avr32/kernel/time.c

+85 −163

Original line number	Diff line number	Diff line
		/*
		* Copyright (C) 2004-2007 Atmel Corporation
		*
		* Based on MIPS implementation arch/mips/kernel/time.c
		* Copyright 2001 MontaVista Software Inc.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 as
		* published by the Free Software Foundation.
		*/

		#include <linux/clk.h>
		#include <linux/clocksource.h>
		#include <linux/clockchips.h>
		#include <linux/time.h>
		#include <linux/module.h>
		#include <linux/interrupt.h>
		@@ -27,207 +23,133 @@
		#include <asm/io.h>
		#include <asm/sections.h>

		/* how many counter cycles in a jiffy? */
		static u32 cycles_per_jiffy;
		#include <asm/arch/pm.h>

		/* the count value for the next timer interrupt */
		static u32 expirelo;

		cycle_t __weak read_cycle_count(void)
		static cycle_t read_cycle_count(void)
		{
		return (cycle_t)sysreg_read(COUNT);
		}

		struct clocksource __weak clocksource_avr32 = {
		.name = "avr32",
		.rating = 350,
		/*
		* The architectural cycle count registers are a fine clocksource unless
		* the system idle loop use sleep states like "idle": the CPU cycles
		* measured by COUNT (and COMPARE) don't happen during sleep states.
		* Their duration also changes if cpufreq changes the CPU clock rate.
		* So we rate the clocksource using COUNT as very low quality.
		*/
		static struct clocksource counter = {
		.name = "avr32_counter",
		.rating = 50,
		.read = read_cycle_count,
		.mask = CLOCKSOURCE_MASK(32),
		.shift = 16,
		.flags = CLOCK_SOURCE_IS_CONTINUOUS,
		};

		irqreturn_t __weak timer_interrupt(int irq, void *dev_id);

		struct irqaction timer_irqaction = {
		.handler = timer_interrupt,
		.flags = IRQF_DISABLED,
		.name = "timer",
		};
		static irqreturn_t timer_interrupt(int irq, void *dev_id)
		{
		struct clock_event_device *evdev = dev_id;

		/*
		* By default we provide the null RTC ops
		* Disable the interrupt until the clockevent subsystem
		* reprograms it.
		*/
		static unsigned long null_rtc_get_time(void)
		{
		return mktime(2007, 1, 1, 0, 0, 0);
		}

		static int null_rtc_set_time(unsigned long sec)
		{
		return 0;
		}

		static unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
		static int (*rtc_set_time)(unsigned long) = null_rtc_set_time;

		static void avr32_timer_ack(void)
		{
		u32 count;

		/* Ack this timer interrupt and set the next one */
		expirelo += cycles_per_jiffy;
		/* setting COMPARE to 0 stops the COUNT-COMPARE */
		if (expirelo == 0) {
		sysreg_write(COMPARE, expirelo + 1);
		} else {
		sysreg_write(COMPARE, expirelo);
		}
		sysreg_write(COMPARE, 0);

		/* Check to see if we have missed any timer interrupts */
		count = sysreg_read(COUNT);
		if ((count - expirelo) < 0x7fffffff) {
		expirelo = count + cycles_per_jiffy;
		sysreg_write(COMPARE, expirelo);
		}
		evdev->event_handler(evdev);
		return IRQ_HANDLED;
		}

		int __weak avr32_hpt_init(void)
		{
		int ret;
		unsigned long mult, shift, count_hz;

		count_hz = clk_get_rate(boot_cpu_data.clk);
		shift = clocksource_avr32.shift;
		mult = clocksource_hz2mult(count_hz, shift);
		clocksource_avr32.mult = mult;
		static struct irqaction timer_irqaction = {
		.handler = timer_interrupt,
		.flags = IRQF_TIMER \| IRQF_DISABLED,
		.name = "avr32_comparator",
		};

		static int comparator_next_event(unsigned long delta,
		struct clock_event_device *evdev)
		{
		u64 tmp;

		tmp = TICK_NSEC;
		tmp <<= shift;
		tmp += mult / 2;
		do_div(tmp, mult);
		unsigned long flags;

		cycles_per_jiffy = tmp;
		}
		raw_local_irq_save(flags);

		ret = setup_irq(0, &timer_irqaction);
		if (ret) {
		pr_debug("timer: could not request IRQ 0: %d\n", ret);
		return -ENODEV;
		}
		/* The time to read COUNT then update COMPARE must be less
		* than the min_delta_ns value for this clockevent source.
		*/
		sysreg_write(COMPARE, (sysreg_read(COUNT) + delta) ? : 1);

		printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
		"%lu.%03lu MHz\n",
		((count_hz + 500) / 1000) / 1000,
		((count_hz + 500) / 1000) % 1000);
		raw_local_irq_restore(flags);

		return 0;
		}

		/*
		* Taken from MIPS c0_hpt_timer_init().
		*
		* The reason COUNT is written twice is probably to make sure we don't get any
		* timer interrupts while we are messing with the counter.
		*/
		int __weak avr32_hpt_start(void)
		static void comparator_mode(enum clock_event_mode mode,
		struct clock_event_device *evdev)
		{
		u32 count = sysreg_read(COUNT);
		expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
		sysreg_write(COUNT, expirelo - cycles_per_jiffy);
		sysreg_write(COMPARE, expirelo);
		sysreg_write(COUNT, count);

		return 0;
		switch (mode) {
		case CLOCK_EVT_MODE_ONESHOT:
		pr_debug("%s: start\n", evdev->name);
		/* FALLTHROUGH */
		case CLOCK_EVT_MODE_RESUME:
		cpu_disable_idle_sleep();
		break;
		case CLOCK_EVT_MODE_UNUSED:
		case CLOCK_EVT_MODE_SHUTDOWN:
		sysreg_write(COMPARE, 0);
		pr_debug("%s: stop\n", evdev->name);
		cpu_enable_idle_sleep();
		break;
		default:
		BUG();
		}

		/*
		* local_timer_interrupt() does profiling and process accounting on a
		* per-CPU basis.
		*
		* In UP mode, it is invoked from the (global) timer_interrupt.
		*/
		void local_timer_interrupt(int irq, void *dev_id)
		{
		if (current->pid)
		profile_tick(CPU_PROFILING);
		update_process_times(user_mode(get_irq_regs()));
		}

		irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
		{
		/* ack timer interrupt and try to set next interrupt */
		avr32_timer_ack();

		/*
		* Call the generic timer interrupt handler
		*/
		write_seqlock(&xtime_lock);
		do_timer(1);
		write_sequnlock(&xtime_lock);

		/*
		* In UP mode, we call local_timer_interrupt() to do profiling
		* and process accounting.
		*
		* SMP is not supported yet.
		*/
		local_timer_interrupt(irq, dev_id);

		return IRQ_HANDLED;
		}
		static struct clock_event_device comparator = {
		.name = "avr32_comparator",
		.features = CLOCK_EVT_FEAT_ONESHOT,
		.shift = 16,
		.rating = 50,
		.cpumask = CPU_MASK_CPU0,
		.set_next_event = comparator_next_event,
		.set_mode = comparator_mode,
		};

		void __init time_init(void)
		{
		unsigned long counter_hz;
		int ret;

		/*
		* Make sure we don't get any COMPARE interrupts before we can
		* handle them.
		*/
		sysreg_write(COMPARE, 0);

		xtime.tv_sec = rtc_get_time();
		xtime.tv_sec = mktime(2007, 1, 1, 0, 0, 0);
		xtime.tv_nsec = 0;

		set_normalized_timespec(&wall_to_monotonic,
		-xtime.tv_sec, -xtime.tv_nsec);

		ret = avr32_hpt_init();
		if (ret) {
		pr_debug("timer: failed setup: %d\n", ret);
		return;
		}
		/* figure rate for counter */
		counter_hz = clk_get_rate(boot_cpu_data.clk);
		counter.mult = clocksource_hz2mult(counter_hz, counter.shift);

		ret = clocksource_register(&clocksource_avr32);
		ret = clocksource_register(&counter);
		if (ret)
		pr_debug("timer: could not register clocksource: %d\n", ret);

		ret = avr32_hpt_start();
		if (ret) {
		pr_debug("timer: failed starting: %d\n", ret);
		return;
		}
		}
		/* setup COMPARE clockevent */
		comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
		comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator);
		comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1;

		static struct sysdev_class timer_class = {
		.name = "timer",
		};
		sysreg_write(COMPARE, 0);
		timer_irqaction.dev_id = &comparator;

		static struct sys_device timer_device = {
		.id = 0,
		.cls = &timer_class,
		};
		ret = setup_irq(0, &timer_irqaction);
		if (ret)
		pr_debug("timer: could not request IRQ 0: %d\n", ret);
		else {
		clockevents_register_device(&comparator);

		static int __init init_timer_sysfs(void)
		{
		int err = sysdev_class_register(&timer_class);
		if (!err)
		err = sysdev_register(&timer_device);
		return err;
		pr_info("%s: irq 0, %lu.%03lu MHz\n", comparator.name,
		((counter_hz + 500) / 1000) / 1000,
		((counter_hz + 500) / 1000) % 1000);
		}
		}

		device_initcall(init_timer_sysfs);

arch/avr32/mach-at32ap/Makefile

+1 −2

Original line number	Diff line number	Diff line
		obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
		obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o
		obj-$(CONFIG_CPU_AT32AP700X) += time-tc.o
		obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o pm-at32ap700x.o
		obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o

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