Commit c381585f authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v3.15-rockchip-smp' of... 

Merge tag 'v3.15-rockchip-smp' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc

Merge Rockchip SMP support from Heiko Stübner:

SMP-support for RK3066 and RK3188 SoCs from Rockchip.

* tag 'v3.15-rockchip-smp' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: rockchip: add smp bringup code
  ARM: rockchip: add power-management-unit
  ARM: rockchip: add sram dt nodes and documentation
  ARM: rockchip: add snoop-control-unit

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 6c41a997 a7a2b311

Documentation/devicetree/bindings/arm/rockchip/pmu.txt

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Rockchip power-management-unit:

-------------------------------



The pmu is used to turn off and on different power domains of the SoCs

This includes the power to the CPU cores.



Required node properties:

- compatible value : = "rockchip,rk3066-pmu";

- reg : physical base address and the size of the registers window



Example:



	pmu@20004000 {

		compatible = "rockchip,rk3066-pmu";

		reg = <0x20004000 0x100>;

	};

Documentation/devicetree/bindings/arm/rockchip/smp-sram.txt

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Rockchip SRAM for smp bringup:

------------------------------



Rockchip's smp-capable SoCs use the first part of the sram for the bringup

of the cores. Once the core gets powered up it executes the code that is

residing at the very beginning of the sram.



Therefore a reserved section sub-node has to be added to the mmio-sram

declaration.



Required sub-node properties:

- compatible : should be "rockchip,rk3066-smp-sram"



The rest of the properties should follow the generic mmio-sram discription

found in ../../misc/sram.txt



Example:



	sram: sram@10080000 {

		compatible = "mmio-sram";

		reg = <0x10080000 0x10000>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		smp-sram@10080000 {

			compatible = "rockchip,rk3066-smp-sram";

			reg = <0x10080000 0x50>;

		};

	};

arch/arm/boot/dts/rk3066a.dtsi

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@@ -64,6 +64,19 @@ 
			clock-names = "timer", "pclk";

		};



		sram: sram@10080000 {

			compatible = "mmio-sram";

			reg = <0x10080000 0x10000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x10080000 0x10000>;



			smp-sram@0 {

				compatible = "rockchip,rk3066-smp-sram";

				reg = <0x0 0x50>;

			};

		};



		pinctrl@20008000 {

			compatible = "rockchip,rk3066a-pinctrl";

			reg = <0x20008000 0x150>;

arch/arm/boot/dts/rk3188.dtsi

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@@ -60,6 +60,19 @@ 
			interrupts = <GIC_PPI 13 0xf04>;

		};



		sram: sram@10080000 {

			compatible = "mmio-sram";

			reg = <0x10080000 0x8000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x10080000 0x8000>;



			smp-sram@0 {

				compatible = "rockchip,rk3066-smp-sram";

				reg = <0x0 0x50>;

			};

		};



		pinctrl@20008000 {

			compatible = "rockchip,rk3188-pinctrl";

			reg = <0x20008000 0xa0>,

arch/arm/boot/dts/rk3xxx.dtsi

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@@ -26,6 +26,16 @@ 
		compatible = "simple-bus";

		ranges;



		scu@1013c000 {

			compatible = "arm,cortex-a9-scu";

			reg = <0x1013c000 0x100>;

		};



		pmu@20004000 {

			compatible = "rockchip,rk3066-pmu";

			reg = <0x20004000 0x100>;

		};



		gic: interrupt-controller@1013d000 {

			compatible = "arm,cortex-a9-gic";

			interrupt-controller;

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