Commit c3424f59 authored Dec 14, 2018 by Weiyi Lu Committed by Stephen Boyd Feb 05, 2019

dt-bindings: clock: add clock for MT2712



Add new clock according to 3rd ECO design change.
It's the parent clock of audio clock mux.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

parent bfeffd15

include/dt-bindings/clock/mt2712-clk.h

+2 −1

Original line number	Diff line number	Diff line
		@@ -228,7 +228,8 @@
		#define CLK_TOP_NFI2X_EN 189
		#define CLK_TOP_NFIECC_EN 190
		#define CLK_TOP_NFI1X_CK_EN 191
		#define CLK_TOP_NR_CLK 192
		#define CLK_TOP_APLL2_D3 192
		#define CLK_TOP_NR_CLK 193

		/* INFRACFG */

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