Commit c3405d68 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull arm64 fixes from Will Deacon:
 "Another handful of arm64 fixes here. Most of the complication comes
  from improving our kpti code to avoid lengthy pauses (30+ seconds)
  during boot when we rewrite the page tables. There are also a couple
  of IORT fixes that came in via Lorenzo.

  Summary:

   - Don't error in kexec_file_load if kaslr-seed is missing in
     device-tree

   - Fix incorrect argument type passed to iort_match_node_callback()

   - Fix IORT build failure when CONFIG_IOMMU_API=n

   - Fix kpti performance regression with new rodata default option

   - Typo fix"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: kexec_file: return successfully even if kaslr-seed doesn't exist
  ACPI/IORT: Fix rc_dma_get_range()
  arm64: kpti: Avoid rewriting early page tables when KASLR is enabled
  arm64: asm-prototypes: Fix fat-fingered typo in comment
  ACPI/IORT: Fix build when CONFIG_IOMMU_API=n
parents f87092c4 27966721
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+1 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@
#ifndef __ASM_PROTOTYPES_H
#define __ASM_PROTOTYPES_H
/*
 * CONFIG_MODEVERIONS requires a C declaration to generate the appropriate CRC
 * CONFIG_MODVERSIONS requires a C declaration to generate the appropriate CRC
 * for each symbol. Since commit:
 *
 *   4efca4ed05cbdfd1 ("kbuild: modversions for EXPORT_SYMBOL() for asm")
+41 −0
Original line number Diff line number Diff line
@@ -16,6 +16,8 @@
#ifndef __ASM_MMU_H
#define __ASM_MMU_H

#include <asm/cputype.h>

#define MMCF_AARCH32	0x1	/* mm context flag for AArch32 executables */
#define USER_ASID_BIT	48
#define USER_ASID_FLAG	(UL(1) << USER_ASID_BIT)
@@ -44,6 +46,45 @@ static inline bool arm64_kernel_unmapped_at_el0(void)
	       cpus_have_const_cap(ARM64_UNMAP_KERNEL_AT_EL0);
}

static inline bool arm64_kernel_use_ng_mappings(void)
{
	bool tx1_bug;

	/* What's a kpti? Use global mappings if we don't know. */
	if (!IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0))
		return false;

	/*
	 * Note: this function is called before the CPU capabilities have
	 * been configured, so our early mappings will be global. If we
	 * later determine that kpti is required, then
	 * kpti_install_ng_mappings() will make them non-global.
	 */
	if (!IS_ENABLED(CONFIG_RANDOMIZE_BASE))
		return arm64_kernel_unmapped_at_el0();

	/*
	 * KASLR is enabled so we're going to be enabling kpti on non-broken
	 * CPUs regardless of their susceptibility to Meltdown. Rather
	 * than force everybody to go through the G -> nG dance later on,
	 * just put down non-global mappings from the beginning.
	 */
	if (!IS_ENABLED(CONFIG_CAVIUM_ERRATUM_27456)) {
		tx1_bug = false;
#ifndef MODULE
	} else if (!static_branch_likely(&arm64_const_caps_ready)) {
		extern const struct midr_range cavium_erratum_27456_cpus[];

		tx1_bug = is_midr_in_range_list(read_cpuid_id(),
						cavium_erratum_27456_cpus);
#endif
	} else {
		tx1_bug = __cpus_have_const_cap(ARM64_WORKAROUND_CAVIUM_27456);
	}

	return !tx1_bug && kaslr_offset() > 0;
}

typedef void (*bp_hardening_cb_t)(void);

struct bp_hardening_data {
+2 −2
Original line number Diff line number Diff line
@@ -37,8 +37,8 @@
#define _PROT_DEFAULT		(PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
#define _PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)

#define PTE_MAYBE_NG		(arm64_kernel_unmapped_at_el0() ? PTE_NG : 0)
#define PMD_MAYBE_NG		(arm64_kernel_unmapped_at_el0() ? PMD_SECT_NG : 0)
#define PTE_MAYBE_NG		(arm64_kernel_use_ng_mappings() ? PTE_NG : 0)
#define PMD_MAYBE_NG		(arm64_kernel_use_ng_mappings() ? PMD_SECT_NG : 0)

#define PROT_DEFAULT		(_PROT_DEFAULT | PTE_MAYBE_NG)
#define PROT_SECT_DEFAULT	(_PROT_SECT_DEFAULT | PMD_MAYBE_NG)
+1 −1
Original line number Diff line number Diff line
@@ -553,7 +553,7 @@ static const struct midr_range arm64_repeat_tlbi_cpus[] = {
#endif

#ifdef CONFIG_CAVIUM_ERRATUM_27456
static const struct midr_range cavium_erratum_27456_cpus[] = {
const struct midr_range cavium_erratum_27456_cpus[] = {
	/* Cavium ThunderX, T88 pass 1.x - 2.1 */
	MIDR_RANGE(MIDR_THUNDERX, 0, 0, 1, 1),
	/* Cavium ThunderX, T81 pass 1.0 */
+7 −2
Original line number Diff line number Diff line
@@ -983,7 +983,7 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,

	/* Useful for KASLR robustness */
	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE))
		return true;
		return kaslr_offset() > 0;

	/* Don't force KPTI for CPUs that are not vulnerable */
	if (is_midr_in_range_list(read_cpuid_id(), kpti_safe_list))
@@ -1003,7 +1003,12 @@ kpti_install_ng_mappings(const struct arm64_cpu_capabilities *__unused)
	static bool kpti_applied = false;
	int cpu = smp_processor_id();

	if (kpti_applied)
	/*
	 * We don't need to rewrite the page-tables if either we've done
	 * it already or we have KASLR enabled and therefore have not
	 * created any global mappings at all.
	 */
	if (kpti_applied || kaslr_offset() > 0)
		return;

	remap_fn = (void *)__pa_symbol(idmap_kpti_install_ng_mappings);
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