Commit c3030d30 authored by Heiko Stuebner's avatar Heiko Stuebner
Browse files

ARM: dts: rockchip: remove soc subnodes 



Comments received from the rk3288 submission indicated that a generic subnode
to group soc components should not be used.

So to keep all rockchip devicetree files similar, remove it from rk3066 and rk3188.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent d356d96f

arch/arm/boot/dts/rk3066a-bqcurie2.dts

+66 −68
Original line number Diff line number Diff line
@@ -24,7 +24,6 @@ 
		reg = <0x60000000 0x40000000>;

	};



	soc {

	uart0: serial@10124000 {

		status = "okay";

	};
@@ -107,4 +106,3 @@ 
		/* VOL+ comes somehow thru the ADC */

	};

};
 
};

arch/arm/boot/dts/rk3066a.dtsi

+194 −196
Original line number Diff line number Diff line
@@ -40,7 +40,6 @@ 
		};

	};



	soc {

	timer@20038000 {

		compatible = "snps,dw-apb-timer-osc";

		reg = <0x20038000 0x100>;
@@ -292,4 +291,3 @@ 
		};

	};

};
 
};

arch/arm/boot/dts/rk3188-radxarock.dts

+40 −43
Original line number Diff line number Diff line
@@ -23,7 +23,6 @@ 
		reg = <0x60000000 0x80000000>;

	};



	soc {

	uart0: serial@10124000 {

		status = "okay";

	};
@@ -76,6 +75,4 @@ 
			default-state = "off";

		};

	};



	};

};

arch/arm/boot/dts/rk3188.dtsi

+166 −168
Original line number Diff line number Diff line
@@ -52,7 +52,6 @@ 
		};

	};



	soc {

	global-timer@1013c200 {

		interrupts = <GIC_PPI 11 0xf04>;

	};
@@ -272,4 +271,3 @@ 
		};

	};

};
 
};

arch/arm/boot/dts/rk3xxx.dtsi

+107 −114
Original line number Diff line number Diff line
@@ -27,12 +27,6 @@ 
		clock-output-names = "xin24m";

	};



	soc {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "simple-bus";

		ranges;



	scu@1013c000 {

		compatible = "arm,cortex-a9-scu";

		reg = <0x1013c000 0x100>;
@@ -143,4 +137,3 @@ 
		status = "disabled";

	};

};
 
};

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