Commit c30267f5 authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher
Browse files

drm/amd/display: TPS4 logic typo fix 



Signed-off-by: default avatarCharlene Liu <charlene.liu@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: default avatarWenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5ac3d3c9

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

+2 −2
Original line number Diff line number Diff line
@@ -921,7 +921,7 @@ static inline bool perform_link_training_int( 
	 * If the upstream DPTX and downstream DPRX both support TPS4,

	 * TPS4 must be used instead of POST_LT_ADJ_REQ.

	 */

	if (link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED != 1 &&

	if (link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED != 1 ||

			get_supported_tp(link) == HW_DP_TRAINING_PATTERN_4)

		return status;

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