Commit c2fcdf6c authored Feb 01, 2015 by Jinshan Xiong Committed by Greg Kroah-Hartman Feb 07, 2015

staging/lustre/llite: to configure max_cached_mb correctly



If there exists MGS conf_param to reduce the memory cache
max_cached_mb it will fail because dt_exp is not initialized
yet.

It should just go ahead and configure it because certainly it
have enough free LRU slot to deduct ccc_lru_left.

Signed-off-by: Jinshan Xiong <jinshan.xiong@intel.com>
Reviewed-on: http://review.whamcloud.com/11783
Intel-bug-id: https://jira.hpdd.intel.com/browse/LU-3676


Reviewed-by: Bobi Jam <bobijam@gmail.com>
Reviewed-by: Andreas Dilger <andreas.dilger@intel.com>
Signed-off-by: Oleg Drokin <oleg.drokin@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent af3fa7c7

drivers/staging/lustre/lustre/llite/lproc_llite.c

+5 −3

Original line number	Diff line number	Diff line
		@@ -399,9 +399,6 @@ static ssize_t ll_max_cached_mb_seq_write(struct file *file,
		return -ERANGE;
		}

		if (sbi->ll_dt_exp == NULL)
		return -ENODEV;

		spin_lock(&sbi->ll_lock);
		diff = pages_number - cache->ccc_lru_max;
		spin_unlock(&sbi->ll_lock);
		@@ -437,6 +434,11 @@ static ssize_t ll_max_cached_mb_seq_write(struct file *file,
		if (diff <= 0)
		break;

		if (sbi->ll_dt_exp == NULL) { /* being initialized */
		rc = -ENODEV;
		break;
		}

		/* difficult - have to ask OSCs to drop LRU slots. */
		tmp = diff << 1;
		rc = obd_set_info_async(NULL, sbi->ll_dt_exp,

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