Commit c2d35ada authored by Michael Walle's avatar Michael Walle Committed by Shawn Guo
Browse files

arm64: dts: ls1028a: add missing SPI nodes 



The LS1028A has three (dual) SPI controller. These are compatible with
the ones from the LS1021A. Add the nodes.

The third controller was tested on a custom board.

Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent f34d4bfa

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

+39 −0
Original line number Diff line number Diff line
@@ -290,6 +290,45 @@ 
			status = "disabled";

		};



		dspi0: spi@2100000 {

			compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x2100000 0x0 0x10000>;

			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "dspi";

			clocks = <&clockgen 4 1>;

			spi-num-chipselects = <4>;

			little-endian;

			status = "disabled";

		};



		dspi1: spi@2110000 {

			compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x2110000 0x0 0x10000>;

			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "dspi";

			clocks = <&clockgen 4 1>;

			spi-num-chipselects = <4>;

			little-endian;

			status = "disabled";

		};



		dspi2: spi@2120000 {

			compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x0 0x2120000 0x0 0x10000>;

			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "dspi";

			clocks = <&clockgen 4 1>;

			spi-num-chipselects = <3>;

			little-endian;

			status = "disabled";

		};



		esdhc: mmc@2140000 {

			compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";

			reg = <0x0 0x2140000 0x0 0x10000>;

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