Commit c2cc62d8 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

arm64: Enable and document ARM errata 1319367 and 1319537 



Now that everything is in place, let's get the ball rolling
by allowing the corresponding config option to be selected.
Also add the required information to silicon_errata.rst.

Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent bd227553

Documentation/arm64/silicon-errata.rst

+4 −0
Original line number Diff line number Diff line
@@ -70,8 +70,12 @@ stable kernels. 
+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A57      | #834220         | ARM64_ERRATUM_834220        |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A57      | #1319537        | ARM64_ERRATUM_1319367       |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A72      | #853709         | N/A                         |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A72      | #1319367        | ARM64_ERRATUM_1319367       |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A73      | #858921         | ARM64_ERRATUM_858921        |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A55      | #1024718        | ARM64_ERRATUM_1024718       |

arch/arm64/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -538,6 +538,16 @@ config ARM64_ERRATUM_1286807 
	  invalidated has been observed by other observers. The

	  workaround repeats the TLBI+DSB operation.



config ARM64_ERRATUM_1319367

	bool "Cortex-A57/A72: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"

	default y

	help

	  This option adds work arounds for ARM Cortex-A57 erratum 1319537

	  and A72 erratum 1319367



	  Cortex-A57 and A72 cores could end-up with corrupted TLBs by

	  speculating an AT instruction during a guest context switch.



	  If unsure, say Y.



config ARM64_ERRATUM_1463225

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