Commit c2bcbe65 authored by Michael Buesch's avatar Michael Buesch Committed by John W. Linville
Browse files

ssb: Fix the GPIO API



This fixes the GPIO API to be usable.

Signed-off-by: default avatarMichael Buesch <mb@bu3sch.de>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 42bfad4f
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+29 −6
Original line number Diff line number Diff line
@@ -39,12 +39,14 @@ static inline void chipco_write32(struct ssb_chipcommon *cc,
	ssb_write32(cc->dev, offset, value);
}

static inline void chipco_write32_masked(struct ssb_chipcommon *cc, u16 offset,
static inline u32 chipco_write32_masked(struct ssb_chipcommon *cc, u16 offset,
					u32 mask, u32 value)
{
	value &= mask;
	value |= chipco_read32(cc, offset) & ~mask;
	chipco_write32(cc, offset, value);

	return value;
}

void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
@@ -355,16 +357,37 @@ u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask)
{
	return chipco_read32(cc, SSB_CHIPCO_GPIOIN) & mask;
}
EXPORT_SYMBOL(ssb_chipco_gpio_in);

u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value)
{
	return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value);
}
EXPORT_SYMBOL(ssb_chipco_gpio_out);

u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value)
{
	return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value);
}
EXPORT_SYMBOL(ssb_chipco_gpio_outen);

u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value)
{
	return chipco_write32_masked(cc, SSB_CHIPCO_GPIOCTL, mask, value);
}
EXPORT_SYMBOL(ssb_chipco_gpio_control);

void ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value)
u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value)
{
	chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value);
	return chipco_write32_masked(cc, SSB_CHIPCO_GPIOIRQ, mask, value);
}
EXPORT_SYMBOL(ssb_chipco_gpio_intmask);

void ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value)
u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value)
{
	chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value);
	return chipco_write32_masked(cc, SSB_CHIPCO_GPIOPOL, mask, value);
}
EXPORT_SYMBOL(ssb_chipco_gpio_polarity);

#ifdef CONFIG_SSB_SERIAL
int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
+20 −4
Original line number Diff line number Diff line
@@ -27,12 +27,14 @@ static inline void extif_write32(struct ssb_extif *extif, u16 offset, u32 value)
	ssb_write32(extif->dev, offset, value);
}

static inline void extif_write32_masked(struct ssb_extif *extif, u16 offset,
static inline u32 extif_write32_masked(struct ssb_extif *extif, u16 offset,
				       u32 mask, u32 value)
{
	value &= mask;
	value |= extif_read32(extif, offset) & ~mask;
	extif_write32(extif, offset, value);

	return value;
}

#ifdef CONFIG_SSB_SERIAL
@@ -120,16 +122,30 @@ u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask)
{
	return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask;
}
EXPORT_SYMBOL(ssb_extif_gpio_in);

void ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value)
u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value)
{
	return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
				   mask, value);
}
EXPORT_SYMBOL(ssb_extif_gpio_out);

void ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value)
u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value)
{
	return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
				   mask, value);
}
EXPORT_SYMBOL(ssb_extif_gpio_outen);

u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value)
{
	return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
}
EXPORT_SYMBOL(ssb_extif_gpio_polarity);

u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value)
{
	return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
}
EXPORT_SYMBOL(ssb_extif_gpio_intmask);
+6 −4
Original line number Diff line number Diff line
@@ -390,11 +390,13 @@ extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
extern void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc,
					  u32 ticks);

/* Chipcommon GPIO pin access. */
u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask);

void ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value);

void ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value);

#ifdef CONFIG_SSB_SERIAL
extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
+5 −4
Original line number Diff line number Diff line
@@ -174,11 +174,12 @@ extern void ssb_extif_timing_init(struct ssb_extif *extif,
extern void ssb_extif_watchdog_timer_set(struct ssb_extif *extif,
					 u32 ticks);

/* Extif GPIO pin access */
u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask);

void ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value);

void ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value);

#ifdef CONFIG_SSB_SERIAL
extern int ssb_extif_serial_init(struct ssb_extif *extif,