Commit c267bd44 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
Browse files

clk: imx8mp: Rename the IMX8MP_CLK_HDMI_27M clock 



On i.MX8MP, internal HDMI 27M clock is actually 24MHz, so rename
the IMX8MP_CLK_HDMI_27M to IMX8MP_CLK_HDMI_24M.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 6b2d0cff

drivers/clk/imx/clk-imx8mp.c

+2 −2
Original line number Diff line number Diff line
@@ -342,7 +342,7 @@ static const char * const imx8mp_hdmi_fdcc_tst_sels[] = {"osc_24m", "sys_pll1_26 
							 "sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out",

							 "audio_pll2_out", "video_pll1_out", };



static const char * const imx8mp_hdmi_27m_sels[] = {"osc_24m", "sys_pll1_160m", "sys_pll2_50m",

static const char * const imx8mp_hdmi_24m_sels[] = {"osc_24m", "sys_pll1_160m", "sys_pll2_50m",

						    "sys_pll3_out", "audio_pll1_out", "video_pll1_out",

						    "audio_pll2_out", "sys_pll1_133m", };
@@ -632,7 +632,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev) 
	hws[IMX8MP_CLK_IPP_DO_CLKO1] = imx8m_clk_hw_composite("ipp_do_clko1", imx8mp_ipp_do_clko1_sels, ccm_base + 0xba00);

	hws[IMX8MP_CLK_IPP_DO_CLKO2] = imx8m_clk_hw_composite("ipp_do_clko2", imx8mp_ipp_do_clko2_sels, ccm_base + 0xba80);

	hws[IMX8MP_CLK_HDMI_FDCC_TST] = imx8m_clk_hw_composite("hdmi_fdcc_tst", imx8mp_hdmi_fdcc_tst_sels, ccm_base + 0xbb00);

	hws[IMX8MP_CLK_HDMI_27M] = imx8m_clk_hw_composite("hdmi_27m", imx8mp_hdmi_27m_sels, ccm_base + 0xbb80);

	hws[IMX8MP_CLK_HDMI_24M] = imx8m_clk_hw_composite("hdmi_24m", imx8mp_hdmi_24m_sels, ccm_base + 0xbb80);

	hws[IMX8MP_CLK_HDMI_REF_266M] = imx8m_clk_hw_composite("hdmi_ref_266m", imx8mp_hdmi_ref_266m_sels, ccm_base + 0xbc00);

	hws[IMX8MP_CLK_USDHC3] = imx8m_clk_hw_composite("usdhc3", imx8mp_usdhc3_sels, ccm_base + 0xbc80);

	hws[IMX8MP_CLK_MEDIA_CAM1_PIX] = imx8m_clk_hw_composite("media_cam1_pix", imx8mp_media_cam1_pix_sels, ccm_base + 0xbd00);

include/dt-bindings/clock/imx8mp-clock.h

+1 −1
Original line number Diff line number Diff line
@@ -173,7 +173,7 @@ 
#define IMX8MP_CLK_IPP_DO_CLKO1			164

#define IMX8MP_CLK_IPP_DO_CLKO2			165

#define IMX8MP_CLK_HDMI_FDCC_TST		166

#define IMX8MP_CLK_HDMI_27M			167

#define IMX8MP_CLK_HDMI_24M			167

#define IMX8MP_CLK_HDMI_REF_266M		168

#define IMX8MP_CLK_USDHC3			169

#define IMX8MP_CLK_MEDIA_CAM1_PIX		170

CRA Git | Maintained and supported by SUSTech CRA and CCSE