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The lancer G5 chip family fails the CQ create with 16k page size. The hardware incorrectly reports it supports large page sizes when it is actually limited to 4k pages. A prior patch resolved this for the A0 chip revision only. This patch excludes all revisions of the G5 asic from using large page sizes. As knowing the actual chip revision is unnecessary, the now unused definitions are removed Signed-off-by:Dick Kennedy <dick.kennedy@broadcom.com> Signed-off-by:
James Smart <james.smart@broadcom.com> Reviewed-by:
Hannes Reinecke <hare@suse.com> Signed-off-by:
Martin K. Petersen <martin.petersen@oracle.com>
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