Commit c209d25e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'omap-for-v4.16/fixes-signed' of... 

Merge tag 'omap-for-v4.16/fixes-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Fixes for omaps for v4.16-rc cycle

This is mostly SoC related fixes for clocks, interconnect, and PM with few
board specifc dts related fixes:

- Fix quirk handling for ti-sysc to check all quirk flags instead of just
  the first one

- Fix LogicPD boards for i2c1 muxing to avoid intermittent PMIC errors

- Fix debounce-interval use for omap5-uevm

- Fix debugfs_create_*() usage for omap1

- Fix sar_base initialization for HS omaps

- Fix omap3 prm wake interrupt for resume

- Fix kmemleak for omap_get_timer_dt()

- Enable optional clocks before main clock to prevent interconnect target
  module from being stuck in transition

* tag 'omap-for-v4.16/fixes-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  bus: ti-sysc: Fix checking of no-reset-on-init quirk
  ARM: dts: LogicPD SOM-LV: Fix I2C1 pinmux
  ARM: dts: LogicPD Torpedo: Fix I2C1 pinmux
  ARM: dts: OMAP5: uevm: Fix "debounce-interval" property misspelling
  ARM: OMAP1: clock: Fix debugfs_create_*() usage
  ARM: OMAP2+: Fix sar_base inititalization for HS omaps
  ARM: OMAP3: Fix prm wake interrupt for resume
  ARM: OMAP2+: timer: fix a kmemleak caused in omap_get_timer_dt
  ARM: OMAP2+: hwmod_core: enable optional clocks before main clock
parents ac07b9aa d39b6ea4

arch/arm/boot/dts/logicpd-som-lv.dtsi

+8 −1
Original line number Diff line number Diff line
@@ -71,6 +71,8 @@ 
};



&i2c1 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2c1_pins>;

	clock-frequency = <2600000>;



	twl: twl@48 {
@@ -189,7 +191,12 @@ 
		>;

	};





	i2c1_pins: pinmux_i2c1_pins {

		pinctrl-single,pins = <

			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl.i2c1_scl */

			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda.i2c1_sda */

		>;

	};

};



&omap3_pmx_wkup {

arch/arm/boot/dts/logicpd-torpedo-som.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -66,6 +66,8 @@ 
};



&i2c1 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2c1_pins>;

	clock-frequency = <2600000>;



	twl: twl@48 {
@@ -136,6 +138,12 @@ 
			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)	/* hsusb0_data7.hsusb0_data7 */

		>;

	};

	i2c1_pins: pinmux_i2c1_pins {

		pinctrl-single,pins = <

			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl.i2c1_scl */

			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda.i2c1_sda */

		>;

	};

};



&uart2 {

arch/arm/boot/dts/omap5-uevm.dts

+1 −1
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ 
			gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;	/* gpio3_83 */

			wakeup-source;

			autorepeat;

			debounce_interval = <50>;

			debounce-interval = <50>;

		};

	};

arch/arm/mach-omap1/clock.c

+3 −3
Original line number Diff line number Diff line
@@ -1011,17 +1011,17 @@ static int clk_debugfs_register_one(struct clk *c) 
		return -ENOMEM;

	c->dent = d;



	d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);

	d = debugfs_create_u8("usecount", S_IRUGO, c->dent, &c->usecount);

	if (!d) {

		err = -ENOMEM;

		goto err_out;

	}

	d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);

	d = debugfs_create_ulong("rate", S_IRUGO, c->dent, &c->rate);

	if (!d) {

		err = -ENOMEM;

		goto err_out;

	}

	d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);

	d = debugfs_create_x8("flags", S_IRUGO, c->dent, &c->flags);

	if (!d) {

		err = -ENOMEM;

		goto err_out;

arch/arm/mach-omap2/omap-wakeupgen.c

+2 −2
Original line number Diff line number Diff line
@@ -299,8 +299,6 @@ static void irq_save_context(void) 
	if (soc_is_dra7xx())

		return;



	if (!sar_base)

		sar_base = omap4_get_sar_ram_base();

	if (wakeupgen_ops && wakeupgen_ops->save_context)

		wakeupgen_ops->save_context();

}
@@ -598,6 +596,8 @@ static int __init wakeupgen_init(struct device_node *node, 
	irq_hotplug_init();

	irq_pm_init();



	sar_base = omap4_get_sar_ram_base();



	return 0;

}

IRQCHIP_DECLARE(ti_wakeupgen, "ti,omap4-wugen-mpu", wakeupgen_init);

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