Commit c1fce66e authored by Icenowy Zheng's avatar Icenowy Zheng Committed by Greg Kroah-Hartman
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usb: musb: sunxi: add support for the variant in H3/V3s SoC 



Allwinner H3/V3s features a variant of MUSB controller, which lacks one
endpoint.

Add support for it.

Signed-off-by: default avatarIcenowy Zheng <icenowy@aosc.xyz>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
[b-liu@ti.com: added usb: to commit subject prefix]
Signed-off-by: default avatarBin Liu <b-liu@ti.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c0927fea

Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt

+2 −2
Original line number Diff line number Diff line
@@ -2,8 +2,8 @@ Allwinner sun4i A10 musb DRC/OTG controller 
-------------------------------------------



Required properties:

 - compatible      : "allwinner,sun4i-a10-musb", "allwinner,sun6i-a31-musb"

                     or "allwinner,sun8i-a33-musb"

 - compatible      : "allwinner,sun4i-a10-musb", "allwinner,sun6i-a31-musb",

                     "allwinner,sun8i-a33-musb" or "allwinner,sun8i-h3-musb"

 - reg             : mmio address range of the musb controller

 - clocks          : clock specifier for the musb controller ahb gate clock

 - reset           : reset specifier for the ahb reset (A31 and newer only)

drivers/usb/musb/sunxi.c

+33 −2
Original line number Diff line number Diff line
@@ -639,6 +639,20 @@ static struct musb_fifo_cfg sunxi_musb_mode_cfg[] = { 
	MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512),

};



/* H3/V3s OTG supports only 4 endpoints */

#define SUNXI_MUSB_MAX_EP_NUM_H3	5



static struct musb_fifo_cfg sunxi_musb_mode_cfg_h3[] = {

	MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),

	MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),

	MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),

	MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),

	MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),

	MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),

	MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),

	MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),

};



static const struct musb_hdrc_config sunxi_musb_hdrc_config = {

	.fifo_cfg       = sunxi_musb_mode_cfg,

	.fifo_cfg_size  = ARRAY_SIZE(sunxi_musb_mode_cfg),
@@ -650,6 +664,18 @@ static const struct musb_hdrc_config sunxi_musb_hdrc_config = { 
	.dma		= 0,

};



static struct musb_hdrc_config sunxi_musb_hdrc_config_h3 = {

	.fifo_cfg       = sunxi_musb_mode_cfg_h3,

	.fifo_cfg_size  = ARRAY_SIZE(sunxi_musb_mode_cfg_h3),

	.multipoint	= true,

	.dyn_fifo	= true,

	.soft_con       = true,

	.num_eps	= SUNXI_MUSB_MAX_EP_NUM_H3,

	.ram_bits	= SUNXI_MUSB_RAM_BITS,

	.dma		= 0,

};





static int sunxi_musb_probe(struct platform_device *pdev)

{

	struct musb_hdrc_platform_data	pdata;
@@ -692,7 +718,10 @@ static int sunxi_musb_probe(struct platform_device *pdev) 
		return -EINVAL;

	}

	pdata.platform_ops	= &sunxi_musb_ops;

	if (!of_device_is_compatible(np, "allwinner,sun8i-h3-musb"))

		pdata.config = &sunxi_musb_hdrc_config;

	else

		pdata.config = &sunxi_musb_hdrc_config_h3;



	glue->dev = &pdev->dev;

	INIT_WORK(&glue->work, sunxi_musb_work);
@@ -704,7 +733,8 @@ static int sunxi_musb_probe(struct platform_device *pdev) 
	if (of_device_is_compatible(np, "allwinner,sun6i-a31-musb"))

		set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags);



	if (of_device_is_compatible(np, "allwinner,sun8i-a33-musb")) {

	if (of_device_is_compatible(np, "allwinner,sun8i-a33-musb") ||

	    of_device_is_compatible(np, "allwinner,sun8i-h3-musb")) {

		set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags);

		set_bit(SUNXI_MUSB_FL_NO_CONFIGDATA, &glue->flags);

	}
@@ -798,6 +828,7 @@ static const struct of_device_id sunxi_musb_match[] = { 
	{ .compatible = "allwinner,sun4i-a10-musb", },

	{ .compatible = "allwinner,sun6i-a31-musb", },

	{ .compatible = "allwinner,sun8i-a33-musb", },

	{ .compatible = "allwinner,sun8i-h3-musb", },

	{}

};

MODULE_DEVICE_TABLE(of, sunxi_musb_match);

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