dt-bindings: interrupt-controller: Convert mrvl,intc to json-schema

* Marvell MMP Interrupt controller

Required properties:

- compatible : Should be

               "mrvl,mmp-intc" on Marvel MMP,

               "mrvl,mmp2-intc" along with "mrvl,mmp2-mux-intc" on MMP2 or

               "marvell,mmp3-intc" with "mrvl,mmp2-mux-intc" on MMP3

- reg : Address and length of the register set of the interrupt controller.

  If the interrupt controller is intc, address and length means the range

  of the whole interrupt controller. The "marvell,mmp3-intc" controller

  also has a secondary range for the second CPU core.  If the interrupt

  controller is mux-intc, address and length means one register. Since

  address of mux-intc is in the range of intc. mux-intc is secondary

  interrupt controller.

- reg-names : Name of the register set of the interrupt controller. It's

  only required in mux-intc interrupt controller.

- interrupts : Should be the port interrupt shared by mux interrupts. It's

  only required in mux-intc interrupt controller.

- interrupt-controller : Identifies the node as an interrupt controller.

- #interrupt-cells : Specifies the number of cells needed to encode an

  interrupt source.

- mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt

  controller.

- mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge

  detection first.

Example:

	intc: interrupt-controller@d4282000 {

		compatible = "mrvl,mmp2-intc";

		interrupt-controller;

		#interrupt-cells = <1>;

		reg = <0xd4282000 0x1000>;

		mrvl,intc-nr-irqs = <64>;

	};

	intcmux4@d4282150 {

		compatible = "mrvl,mmp2-mux-intc";

		interrupts = <4>;

		interrupt-controller;

		#interrupt-cells = <1>;

		reg = <0x150 0x4>, <0x168 0x4>;

		reg-names = "mux status", "mux mask";

		mrvl,intc-nr-irqs = <2>;

	};

* Marvell Orion Interrupt controller

Required properties

- compatible :  Should be "marvell,orion-intc".

- #interrupt-cells: Specifies the number of cells needed to encode an

  interrupt source. Supported value is <1>.

- interrupt-controller : Declare this node to be an interrupt controller.

- reg : Interrupt mask address. A list of 4 byte ranges, one per controller.

        One entry in the list represents 32 interrupts.

Example:

	intc: interrupt-controller {

        	compatible = "marvell,orion-intc", "marvell,intc";

		interrupt-controller;

		#interrupt-cells = <1>;

                reg = <0xfed20204 0x04>,

		      <0xfed20214 0x04>;

        };

# SPDX-License-Identifier: GPL-2.0-only

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Marvell MMP/Orion Interrupt controller bindings

maintainers:

  - Thomas Gleixner <tglx@linutronix.de>

  - Jason Cooper <jason@lakedaemon.net>

  - Marc Zyngier <maz@kernel.org>

  - Rob Herring <robh+dt@kernel.org>

allOf:

  - if:

      properties:

        compatible:

          not:

            contains:

              const: marvell,orion-intc

    then:

      required:

        - mrvl,intc-nr-irqs

  - if:

      properties:

        compatible:

          contains:

            enum:

              - mrvl,mmp-intc

              - mrvl,mmp2-intc

    then:

      properties:

        reg:

          maxItems: 1

  - if:

      properties:

        compatible:

          contains:

            enum:

              - marvell,mmp3-intc

              - mrvl,mmp2-mux-intc

    then:

      properties:

        reg:

          minItems: 2

  - if:

      properties:

        compatible:

          contains:

            const: mrvl,mmp2-mux-intc

    then:

      properties:

        interrupts:

          maxItems: 1

        reg-names:

          items:

            - const: 'mux status'

            - const: 'mux mask'

      required:

        - interrupts

    else:

      properties:

        interrupts: false

properties:

  '#interrupt-cells':

    const: 1

  compatible:

    enum:

      - mrvl,mmp-intc

      - mrvl,mmp2-intc

      - marvell,mmp3-intc

      - marvell,orion-intc

      - mrvl,mmp2-mux-intc

  reg:

    minItems: 1

    maxItems: 2

  reg-names: true

  interrupts: true

  interrupt-controller: true

  mrvl,intc-nr-irqs:

    description: |

      Specifies the number of interrupts in the interrupt controller.

    $ref: /schemas/types.yaml#/definitions/uint32

  mrvl,clr-mfp-irq:

    description: |

      Specifies the interrupt that needs to clear MFP edge detection first.

    $ref: /schemas/types.yaml#/definitions/uint32

required:

  - '#interrupt-cells'

  - compatible

  - reg

  - interrupt-controller

additionalProperties: false

examples:

  - |

    interrupt-controller@d4282000 {

        compatible = "mrvl,mmp2-intc";

        interrupt-controller;

        #interrupt-cells = <1>;

        reg = <0xd4282000 0x1000>;

        mrvl,intc-nr-irqs = <64>;

    };

    interrupt-controller@d4282150 {

        compatible = "mrvl,mmp2-mux-intc";

        interrupts = <4>;

        interrupt-controller;

        #interrupt-cells = <1>;

        reg = <0x150 0x4>, <0x168 0x4>;

        reg-names = "mux status", "mux mask";

        mrvl,intc-nr-irqs = <2>;

    };

  - |

    interrupt-controller@fed20204 {

        compatible = "marvell,orion-intc";

        interrupt-controller;

        #interrupt-cells = <1>;

        reg = <0xfed20204 0x04>,

              <0xfed20214 0x04>;

    };

...