Commit c1a5a43c authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'for_3.19/samsung-pinctrl' of... 

Merge tag 'for_3.19/samsung-pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-pinctrl into devel

Samsung pinctrl patches for v3.19

1) pinctrl-samsung data structure clean-up

8100cf47 pinctrl: samsung: Separate per-bank init and runtime data
1bf00d7a pinctrl: samsung: Constify samsung_pin_ctrl struct
94ce944b pinctrl: samsung: Constify samsung_pin_bank_type struct
e06deff9 pinctrl: samsung: Drop unused label field in samsung_pin_ctrl struct
87993273 pinctrl: samsung: Make samsung_pinctrl_get_soc_data use ERR_PTR()

2) pinctrl-samsung Exynos7 support

50cea0cf pinctrl: exynos: Add initial driver data for Exynos7
14c255d3 pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts
6f5e41bd pinctrl: exynos: Consolidate irq domain callbacks
0d3d30db pinctrl: exynos: Generalize the eint16_31 demux code

3) pinctrl-samsung Exynos4415 support

2891ba29 pinctrl: exynos: Add support for Exynos4415
parents 6e08d6bb 2891ba29

Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt

+3 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ Required Properties: 
  - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.

  - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.

  - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.

  - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.



- reg: Base address of the pin controller hardware module and length of

  the address space it occupies.
@@ -136,6 +137,8 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a 
       found on Samsung S3C64xx SoCs,

     - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller

       found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.

     - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller

       found on Samsung Exynos7 SoC.

   - interrupt-parent: phandle of the interrupt parent to which the external

     wakeup interrupts are forwarded to.

   - interrupts: interrupt used by multiplexed wakeup interrupts.

drivers/pinctrl/samsung/pinctrl-exynos.c

+271 −105

File changed.

Preview size limit exceeded, changes collapsed.

drivers/pinctrl/samsung/pinctrl-exynos.h

+3 −0
Original line number Diff line number Diff line
@@ -25,6 +25,9 @@ 
#define EXYNOS_WKUP_ECON_OFFSET		0xE00

#define EXYNOS_WKUP_EMASK_OFFSET	0xF00

#define EXYNOS_WKUP_EPEND_OFFSET	0xF40

#define EXYNOS7_WKUP_ECON_OFFSET	0x700

#define EXYNOS7_WKUP_EMASK_OFFSET	0x900

#define EXYNOS7_WKUP_EPEND_OFFSET	0xA00

#define EXYNOS_SVC_OFFSET		0xB08

#define EXYNOS_EINT_FUNC		0xF

drivers/pinctrl/samsung/pinctrl-s3c24xx.c

+13 −17
Original line number Diff line number Diff line
@@ -44,12 +44,12 @@ 
#define EINT_EDGE_BOTH		6

#define EINT_MASK		0xf



static struct samsung_pin_bank_type bank_type_1bit = {

static const struct samsung_pin_bank_type bank_type_1bit = {

	.fld_width = { 1, 1, },

	.reg_offset = { 0x00, 0x04, },

};



static struct samsung_pin_bank_type bank_type_2bit = {

static const struct samsung_pin_bank_type bank_type_2bit = {

	.fld_width = { 2, 1, 2, },

	.reg_offset = { 0x00, 0x04, 0x08, },

};
@@ -143,7 +143,7 @@ static void s3c24xx_eint_set_handler(unsigned int irq, unsigned int type) 
static void s3c24xx_eint_set_function(struct samsung_pinctrl_drv_data *d,

					struct samsung_pin_bank *bank, int pin)

{

	struct samsung_pin_bank_type *bank_type = bank->type;

	const struct samsung_pin_bank_type *bank_type = bank->type;

	unsigned long flags;

	void __iomem *reg;

	u8 shift;
@@ -518,8 +518,8 @@ static int s3c24xx_eint_init(struct samsung_pinctrl_drv_data *d) 
		irq_set_handler_data(irq, eint_data);

	}



	bank = d->ctrl->pin_banks;

	for (i = 0; i < d->ctrl->nr_banks; ++i, ++bank) {

	bank = d->pin_banks;

	for (i = 0; i < d->nr_banks; ++i, ++bank) {

		struct s3c24xx_eint_domain_data *ddata;

		unsigned int mask;

		unsigned int irq;
@@ -561,7 +561,7 @@ static int s3c24xx_eint_init(struct samsung_pinctrl_drv_data *d) 
	return 0;

}



static struct samsung_pin_bank s3c2412_pin_banks[] = {

static const struct samsung_pin_bank_data s3c2412_pin_banks[] __initconst = {

	PIN_BANK_A(23, 0x000, "gpa"),

	PIN_BANK_2BIT(11, 0x010, "gpb"),

	PIN_BANK_2BIT(16, 0x020, "gpc"),
@@ -573,16 +573,15 @@ static struct samsung_pin_bank s3c2412_pin_banks[] = { 
	PIN_BANK_2BIT(13, 0x080, "gpj"),

};



struct samsung_pin_ctrl s3c2412_pin_ctrl[] = {

const struct samsung_pin_ctrl s3c2412_pin_ctrl[] __initconst = {

	{

		.pin_banks	= s3c2412_pin_banks,

		.nr_banks	= ARRAY_SIZE(s3c2412_pin_banks),

		.eint_wkup_init = s3c24xx_eint_init,

		.label		= "S3C2412-GPIO",

	},

};



static struct samsung_pin_bank s3c2416_pin_banks[] = {

static const struct samsung_pin_bank_data s3c2416_pin_banks[] __initconst = {

	PIN_BANK_A(27, 0x000, "gpa"),

	PIN_BANK_2BIT(11, 0x010, "gpb"),

	PIN_BANK_2BIT(16, 0x020, "gpc"),
@@ -596,16 +595,15 @@ static struct samsung_pin_bank s3c2416_pin_banks[] = { 
	PIN_BANK_2BIT(2, 0x100, "gpm"),

};



struct samsung_pin_ctrl s3c2416_pin_ctrl[] = {

const struct samsung_pin_ctrl s3c2416_pin_ctrl[] __initconst = {

	{

		.pin_banks	= s3c2416_pin_banks,

		.nr_banks	= ARRAY_SIZE(s3c2416_pin_banks),

		.eint_wkup_init = s3c24xx_eint_init,

		.label		= "S3C2416-GPIO",

	},

};



static struct samsung_pin_bank s3c2440_pin_banks[] = {

static const struct samsung_pin_bank_data s3c2440_pin_banks[] __initconst = {

	PIN_BANK_A(25, 0x000, "gpa"),

	PIN_BANK_2BIT(11, 0x010, "gpb"),

	PIN_BANK_2BIT(16, 0x020, "gpc"),
@@ -617,16 +615,15 @@ static struct samsung_pin_bank s3c2440_pin_banks[] = { 
	PIN_BANK_2BIT(13, 0x0d0, "gpj"),

};



struct samsung_pin_ctrl s3c2440_pin_ctrl[] = {

const struct samsung_pin_ctrl s3c2440_pin_ctrl[] __initconst = {

	{

		.pin_banks	= s3c2440_pin_banks,

		.nr_banks	= ARRAY_SIZE(s3c2440_pin_banks),

		.eint_wkup_init = s3c24xx_eint_init,

		.label		= "S3C2440-GPIO",

	},

};



static struct samsung_pin_bank s3c2450_pin_banks[] = {

static const struct samsung_pin_bank_data s3c2450_pin_banks[] __initconst = {

	PIN_BANK_A(28, 0x000, "gpa"),

	PIN_BANK_2BIT(11, 0x010, "gpb"),

	PIN_BANK_2BIT(16, 0x020, "gpc"),
@@ -641,11 +638,10 @@ static struct samsung_pin_bank s3c2450_pin_banks[] = { 
	PIN_BANK_2BIT(2, 0x100, "gpm"),

};



struct samsung_pin_ctrl s3c2450_pin_ctrl[] = {

const struct samsung_pin_ctrl s3c2450_pin_ctrl[] __initconst = {

	{

		.pin_banks	= s3c2450_pin_banks,

		.nr_banks	= ARRAY_SIZE(s3c2450_pin_banks),

		.eint_wkup_init = s3c24xx_eint_init,

		.label		= "S3C2450-GPIO",

	},

};

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

+15 −16
Original line number Diff line number Diff line
@@ -68,32 +68,32 @@ 
#define EINT_CON_MASK		0xF

#define EINT_CON_LEN		4



static struct samsung_pin_bank_type bank_type_4bit_off = {

static const struct samsung_pin_bank_type bank_type_4bit_off = {

	.fld_width = { 4, 1, 2, 0, 2, 2, },

	.reg_offset = { 0x00, 0x04, 0x08, 0, 0x0c, 0x10, },

};



static struct samsung_pin_bank_type bank_type_4bit_alive = {

static const struct samsung_pin_bank_type bank_type_4bit_alive = {

	.fld_width = { 4, 1, 2, },

	.reg_offset = { 0x00, 0x04, 0x08, },

};



static struct samsung_pin_bank_type bank_type_4bit2_off = {

static const struct samsung_pin_bank_type bank_type_4bit2_off = {

	.fld_width = { 4, 1, 2, 0, 2, 2, },

	.reg_offset = { 0x00, 0x08, 0x0c, 0, 0x10, 0x14, },

};



static struct samsung_pin_bank_type bank_type_4bit2_alive = {

static const struct samsung_pin_bank_type bank_type_4bit2_alive = {

	.fld_width = { 4, 1, 2, },

	.reg_offset = { 0x00, 0x08, 0x0c, },

};



static struct samsung_pin_bank_type bank_type_2bit_off = {

static const struct samsung_pin_bank_type bank_type_2bit_off = {

	.fld_width = { 2, 1, 2, 0, 2, 2, },

	.reg_offset = { 0x00, 0x04, 0x08, 0, 0x0c, 0x10, },

};



static struct samsung_pin_bank_type bank_type_2bit_alive = {

static const struct samsung_pin_bank_type bank_type_2bit_alive = {

	.fld_width = { 2, 1, 2, },

	.reg_offset = { 0x00, 0x04, 0x08, },

};
@@ -272,7 +272,7 @@ static void s3c64xx_irq_set_handler(unsigned int irq, unsigned int type) 
static void s3c64xx_irq_set_function(struct samsung_pinctrl_drv_data *d,

					struct samsung_pin_bank *bank, int pin)

{

	struct samsung_pin_bank_type *bank_type = bank->type;

	const struct samsung_pin_bank_type *bank_type = bank->type;

	unsigned long flags;

	void __iomem *reg;

	u8 shift;
@@ -468,8 +468,8 @@ static int s3c64xx_eint_gpio_init(struct samsung_pinctrl_drv_data *d) 
	}



	nr_domains = 0;

	bank = d->ctrl->pin_banks;

	for (i = 0; i < d->ctrl->nr_banks; ++i, ++bank) {

	bank = d->pin_banks;

	for (i = 0; i < d->nr_banks; ++i, ++bank) {

		unsigned int nr_eints;

		unsigned int mask;
@@ -497,9 +497,9 @@ static int s3c64xx_eint_gpio_init(struct samsung_pinctrl_drv_data *d) 
	}

	data->drvdata = d;



	bank = d->ctrl->pin_banks;

	bank = d->pin_banks;

	nr_domains = 0;

	for (i = 0; i < d->ctrl->nr_banks; ++i, ++bank) {

	for (i = 0; i < d->nr_banks; ++i, ++bank) {

		if (bank->eint_type != EINT_TYPE_GPIO)

			continue;
@@ -735,8 +735,8 @@ static int s3c64xx_eint_eint0_init(struct samsung_pinctrl_drv_data *d) 
		irq_set_handler_data(irq, data);

	}



	bank = d->ctrl->pin_banks;

	for (i = 0; i < d->ctrl->nr_banks; ++i, ++bank) {

	bank = d->pin_banks;

	for (i = 0; i < d->nr_banks; ++i, ++bank) {

		struct s3c64xx_eint0_domain_data *ddata;

		unsigned int nr_eints;

		unsigned int mask;
@@ -780,7 +780,7 @@ static int s3c64xx_eint_eint0_init(struct samsung_pinctrl_drv_data *d) 
}



/* pin banks of s3c64xx pin-controller 0 */

static struct samsung_pin_bank s3c64xx_pin_banks0[] = {

static const struct samsung_pin_bank_data s3c64xx_pin_banks0[] __initconst = {

	PIN_BANK_4BIT_EINTG(8, 0x000, "gpa", 0),

	PIN_BANK_4BIT_EINTG(7, 0x020, "gpb", 8),

	PIN_BANK_4BIT_EINTG(8, 0x040, "gpc", 16),
@@ -804,13 +804,12 @@ static struct samsung_pin_bank s3c64xx_pin_banks0[] = { 
 * Samsung pinctrl driver data for S3C64xx SoC. S3C64xx SoC includes

 * one gpio/pin-mux/pinconfig controller.

 */

struct samsung_pin_ctrl s3c64xx_pin_ctrl[] = {

const struct samsung_pin_ctrl s3c64xx_pin_ctrl[] __initconst = {

	{

		/* pin-controller instance 1 data */

		.pin_banks	= s3c64xx_pin_banks0,

		.nr_banks	= ARRAY_SIZE(s3c64xx_pin_banks0),

		.eint_gpio_init = s3c64xx_eint_gpio_init,

		.eint_wkup_init = s3c64xx_eint_eint0_init,

		.label		= "S3C64xx-GPIO",

	},

};

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