Commit c15c1199 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu into next/soc 

Merge "ARM: mvebu: SoC orion5x DT conversion for v3.16" from Jason Cooper:

mvebu SoC orion5x DT conversion for v3.16

 - orion5x
    - convert to DT

* tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu

: (29 commits)
  ARM: orion: remove no longer needed gpio DT code
  ARM: orion: remove no longer needed DT IRQ code
  ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree
  ARM: orion5x: convert d2net to Device Tree
  ARM: orion5x: convert RD-88F5182 to Device Tree
  ARM: orion5x: remove unneeded code for edmini_v2
  ARM: orion5x: keep TODO list in edmini_v2 DT
  ARM: orion5x: use DT to describe NOR on edmini_v2
  ARM: orion5x: use DT to describe EHCI on edmini_v2
  ARM: orion5x: use DT to describe I2C devices on edmini_v2
  ARM: orion5x: convert edmini_v2 to DT pinctrl
  ARM: orion5x: add standard pinctrl configs for sata0 and sata1
  ARM: orion5x: add Device Bus description at SoC level
  ARM: orion5x: update I2C description at SoC level
  ARM: orion5x: enable pinctrl driver at SoC level
  ARM: orion5x: switch to DT interrupts and timer
  ARM: orion: switch to a per-platform handle_irq() function
  ARM: orion5x: convert to use 'clocks' property for UART controllers
  ARM: orion5x: switch to use the clock driver for DT platforms
  ARM: orion5x: add interrupt for Ethernet in Device Tree
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 05983ed4 19e00f20

arch/arm/boot/dts/Makefile

+4 −1
Original line number Diff line number Diff line
@@ -289,7 +289,10 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ 
	am43x-epos-evm.dtb \

	am437x-gp-evm.dtb \

	dra7-evm.dtb

dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb

dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-d2-network.dtb \

	orion5x-lacie-ethernet-disk-mini-v2.dtb \

	orion5x-maxtor-shared-storage-2.dtb \

	orion5x-rd88f5182-nas.dtb

dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb

dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \

	qcom-msm8960-cdp.dtb \

arch/arm/boot/dts/orion5x-lacie-d2-network.dts

0 → 100644
+236 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

 * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2. This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */



/dts-v1/;



#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include "orion5x-mv88f5182.dtsi"



/ {

	model = "LaCie d2 Network";

	compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x";



	memory {

		reg = <0x00000000 0x4000000>; /* 64 MB */

	};



	chosen {

		bootargs = "console=ttyS0,115200n8 earlyprintk";

		linux,stdout-path = &uart0;

	};



	soc {

		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,

			 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,

			 <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>;

	};



	gpio-keys {

		compatible = "gpio-keys";

		pinctrl-0 = <&pmx_buttons>;

		pinctrl-names = "default";

		#address-cells = <1>;

		#size-cells = <0>;

		front_button {

			label = "Front Push Button";

			linux,code = <KEY_POWER>;

			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;

		};



		power_rocker_sw_on {

			label = "Power rocker switch (on|auto)";

			linux,input-type = <5>; /* EV_SW */

			linux,code = <1>; /* D2NET_SWITCH_POWER_ON */

			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;

		};



		power_rocker_sw_off {

			label = "Power rocker switch (auto|off)";

			linux,input-type = <5>; /* EV_SW */

			linux,code = <2>; /* D2NET_SWITCH_POWER_OFF */

			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;

		};

	};



	regulators {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;

		pinctrl-0 = <&pmx_sata0_power &pmx_sata1_power>;

		pinctrl-names = "default";



		sata0_power: regulator@0 {

			compatible = "regulator-fixed";

			reg = <0>;

			regulator-name = "SATA0 Power";

			regulator-min-microvolt = <5000000>;

			regulator-max-microvolt = <5000000>;

			enable-active-high;

			regulator-always-on;

			regulator-boot-on;

			gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;

		};



		sata1_power: regulator@1 {

			compatible = "regulator-fixed";

			reg = <1>;

			regulator-name = "SATA1 Power";

			regulator-min-microvolt = <5000000>;

			regulator-max-microvolt = <5000000>;

			enable-active-high;

			regulator-always-on;

			regulator-boot-on;

			gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;

		};

	};

};



&devbus_bootcs {

	status = "okay";



	devbus,keep-config;



	/*

	 * Currently the MTD code does not recognize the MX29LV400CBCT

	 * as a bottom-type device. This could cause risks of

	 * accidentally erasing critical flash sectors. We thus define

	 * a single, write-protected partition covering the whole

	 * flash.  TODO: once the flash part TOP/BOTTOM detection

	 * issue is sorted out in the MTD code, break this into at

	 * least three partitions: 'u-boot code', 'u-boot environment'

	 * and 'whatever is left'.

	 */

	flash@0 {

		compatible = "cfi-flash";

		reg = <0 0x80000>;

		bank-width = <1>;

                #address-cells = <1>;

		#size-cells = <1>;



		partition@0 {

			label = "Full512Kb";

			reg = <0 0x80000>;

			read-only;

		};

	};

};



&mdio {

	status = "okay";



	ethphy: ethernet-phy {

		reg = <8>;

	};

};



&ehci0 {

	status = "okay";

};



&eth {

	status = "okay";



	ethernet-port@0 {

		phy-handle = <&ethphy>;

	};

};



&i2c {

	status = "okay";

	clock-frequency = <100000>;

	#address-cells = <1>;



	rtc@32 {

		compatible = "ricoh,rs5c372b";

		reg = <0x32>;

	};



	fan@3e {

		compatible = "gmt,g762";

		reg = <0x3e>;



		/* Not enough HW info */

		status = "disabled";

	};



	eeprom@50 {

		compatible = "atmel,24c08";

		reg = <0x50>;

	};

};



&pinctrl {

	pinctrl-0 = <&pmx_leds &pmx_board_id &pmx_fan_fail>;

	pinctrl-names = "default";



	pmx_board_id: pmx-board-id {

		marvell,pins = "mpp0", "mpp1", "mpp2";

		marvell,function = "gpio";

	};



	pmx_buttons: pmx-buttons {

		marvell,pins = "mpp8", "mpp9", "mpp18";

		marvell,function = "gpio";

	};



	pmx_fan_fail: pmx-fan-fail {

		marvell,pins = "mpp5";

		marvell,function = "gpio";

	};



	/*

	 * MPP6: Red front LED

	 * MPP16: Blue front LED blink control

	 */

	pmx_leds: pmx-leds {

		marvell,pins = "mpp6", "mpp16";

		marvell,function = "gpio";

	};



	pmx_sata0_led_active: pmx-sata0-led-active {

		marvell,pins = "mpp14";

		marvell,function = "sata0";

	};



	pmx_sata0_power: pmx-sata0-power {

		marvell,pins = "mpp3";

		marvell,function = "gpio";

	};



	pmx_sata1_led_active: pmx-sata1-led-active {

		marvell,pins = "mpp15";

		marvell,function = "sata1";

	};



	pmx_sata1_power: pmx-sata1-power {

		marvell,pins = "mpp12";

		marvell,function = "gpio";

	};



	/*

	 * Non MPP GPIOs:

	 *  GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)

	 *  GPIO 23: Blue front LED off

	 *  GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)

	 */

};



&sata {

	pinctrl-0 = <&pmx_sata0_led_active

		     &pmx_sata1_led_active>;

	pinctrl-names = "default";

	status = "okay";

	nr-ports = <2>;

};



&uart0 {

	status = "okay";

};

arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts

+122 −19
Original line number Diff line number Diff line
@@ -6,8 +6,19 @@ 
 * warranty of any kind, whether express or implied.

 */



/*

 * TODO: add Orion USB device port init when kernel.org support is added.

 * TODO: add flash write support: see below.

 * TODO: add power-off support.

 * TODO: add I2C EEPROM support.

 */



/dts-v1/;

/include/ "orion5x.dtsi"



#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include "orion5x-mv88f5182.dtsi"



/ {

	model = "LaCie Ethernet Disk mini V2";
@@ -19,49 +30,84 @@ 


	chosen {

		bootargs = "console=ttyS0,115200n8 earlyprintk";

		linux,stdout-path = &uart0;

	};



	ocp@f1000000 {

		serial@12000 {

			clock-frequency = <166666667>;

			status = "okay";

		};



		sata@80000 {

			status = "okay";

			nr-ports = <2>;

		};

	soc {

		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,

			 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,

			 <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>;

	};



	gpio_keys {

	gpio-keys {

		compatible = "gpio-keys";

		pinctrl-0 = <&pmx_power_button>;

		pinctrl-names = "default";

		#address-cells = <1>;

		#size-cells = <0>;

		button@1 {

			label = "Power-on Switch";

			linux,code = <116>; /* KEY_POWER */

			gpios = <&gpio0 18 0>;

			linux,code = <KEY_POWER>;

			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;

		};

	};



	gpio_leds {

	gpio-leds {

		compatible = "gpio-leds";

		pinctrl-0 = <&pmx_power_led>;

		pinctrl-names = "default";



		led@1 {

			label = "power:blue";

			gpios = <&gpio0 16 1>;

			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;

		};

	};

};



&mdio {

&devbus_bootcs {

	status = "okay";



	ethphy: ethernet-phy {

		reg = <8>;

	/* Read parameters */

	devbus,bus-width    = <8>;

	devbus,turn-off-ps  = <90000>;

	devbus,badr-skew-ps = <0>;

	devbus,acc-first-ps = <186000>;

	devbus,acc-next-ps  = <186000>;



	/* Write parameters */

	devbus,wr-high-ps  = <90000>;

	devbus,wr-low-ps   = <90000>;

	devbus,ale-wr-ps   = <90000>;



	/*

	 * Currently the MTD code does not recognize the MX29LV400CBCT

	 * as a bottom-type device. This could cause risks of

	 * accidentally erasing critical flash sectors. We thus define

	 * a single, write-protected partition covering the whole

	 * flash.  TODO: once the flash part TOP/BOTTOM detection

	 * issue is sorted out in the MTD code, break this into at

	 * least three partitions: 'u-boot code', 'u-boot environment'

	 * and 'whatever is left'.

	 */

	flash@0 {

		compatible = "cfi-flash";

		reg = <0 0x80000>;

		bank-width = <1>;

		#address-cells = <1>;

		#size-cells = <1>;



		partition@0 {

			label = "Full512Kb";

			reg = <0 0x80000>;

			read-only;

		};

	};

};



&ehci0 {

	status = "okay";

};



&eth {

	status = "okay";
@@ -69,3 +115,60 @@ 
		phy-handle = <&ethphy>;

	};

};



&i2c {

	status = "okay";

	clock-frequency = <100000>;

	#address-cells = <1>;



	rtc@32 {

		compatible = "ricoh,rs5c372a";

		reg = <0x32>;

		interrupt-parent = <&gpio0>;

		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

	};

};



&mdio {

	status = "okay";



	ethphy: ethernet-phy {

		reg = <8>;

	};

};



&pinctrl {

	pinctrl-0 = <&pmx_rtc &pmx_power_led_ctrl>;

	pinctrl-names = "default";



	pmx_power_button: pmx-power-button {

		marvell,pins = "mpp18";

		marvell,function = "gpio";

	};



	pmx_power_led: pmx-power-led {

		marvell,pins = "mpp16";

		marvell,function = "gpio";

	};



	pmx_power_led_ctrl: pmx-power-led-ctrl {

		marvell,pins = "mpp17";

		marvell,function = "gpio";

	};



	pmx_rtc: pmx-rtc {

		marvell,pins = "mpp3";

		marvell,function = "gpio";

	};

};



&sata {

	pinctrl-0 = <&pmx_sata0 &pmx_sata1>;

	pinctrl-names = "default";

	status = "okay";

	nr-ports = <2>;

};



&uart0 {

	status = "okay";

};

arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts

0 → 100644
+178 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

 * Copyright (C) Sylver Bruneau <sylver.bruneau@googlemail.com>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2. This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */



/dts-v1/;



#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include "orion5x-mv88f5182.dtsi"



/ {

	model = "Maxtor Shared Storage II";

	compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x";



	memory {

		reg = <0x00000000 0x4000000>; /* 64 MB */

	};



	chosen {

		bootargs = "console=ttyS0,115200n8 earlyprintk";

		linux,stdout-path = &uart0;

	};



	soc {

		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,

			 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,

			 <MBUS_ID(0x01, 0x0f) 0 0xff800000 0x40000>;

	};



	gpio-keys {

		compatible = "gpio-keys";

		pinctrl-0 = <&pmx_buttons>;

		pinctrl-names = "default";

		#address-cells = <1>;

		#size-cells = <0>;

		power {

			label = "Power";

			linux,code = <KEY_POWER>;

			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;

		};



		reset {

			label = "Reset";

			linux,code = <KEY_RESTART>;

			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;

		};

	};

};



&devbus_bootcs {

	status = "okay";



	devbus,keep-config;



	/*

	 * Currently the MTD code does not recognize the MX29LV400CBCT

	 * as a bottom-type device. This could cause risks of

	 * accidentally erasing critical flash sectors. We thus define

	 * a single, write-protected partition covering the whole

	 * flash.  TODO: once the flash part TOP/BOTTOM detection

	 * issue is sorted out in the MTD code, break this into at

	 * least three partitions: 'u-boot code', 'u-boot environment'

	 * and 'whatever is left'.

	 */

	flash@0 {

		compatible = "cfi-flash";

		reg = <0 0x40000>;

		bank-width = <1>;

                #address-cells = <1>;

		#size-cells = <1>;

	};

};



&mdio {

	status = "okay";



	ethphy: ethernet-phy {

		reg = <8>;

	};

};



&ehci0 {

	status = "okay";

};



&eth {

	status = "okay";



	ethernet-port@0 {

		phy-handle = <&ethphy>;

	};

};



&i2c {

	status = "okay";

	clock-frequency = <100000>;

	#address-cells = <1>;



	rtc@68 {

		compatible = "st,m41t81";

		reg = <0x68>;

		pinctrl-0 = <&pmx_rtc>;

		pinctrl-names = "default";

		interrupt-parent = <&gpio0>;

		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

	};

};



&pinctrl {

	pinctrl-0 = <&pmx_leds &pmx_misc>;

	pinctrl-names = "default";



	pmx_buttons: pmx-buttons {

		marvell,pins = "mpp11", "mpp12";

		marvell,function = "gpio";

	};



	/*

	 * MPP0: Power LED

	 * MPP1: Error LED

	 */

	pmx_leds: pmx-leds {

		marvell,pins = "mpp0", "mpp1";

		marvell,function = "gpio";

	};



	/*

	 * MPP4: HDD ind. (Single/Dual)

	 * MPP5: HD0 5V control

	 * MPP6: HD0 12V control

	 * MPP7: HD1 5V control

	 * MPP8: HD1 12V control

	 */

	pmx_misc: pmx-misc {

		marvell,pins = "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", "mpp10";

		marvell,function = "gpio";

	};



	pmx_rtc: pmx-rtc {

		marvell,pins = "mpp3";

		marvell,function = "gpio";

	};



	pmx_sata0_led_active: pmx-sata0-led-active {

		marvell,pins = "mpp14";

		marvell,function = "sata0";

	};



	pmx_sata1_led_active: pmx-sata1-led-active {

		marvell,pins = "mpp15";

		marvell,function = "sata1";

	};



	/*

	 * Non MPP GPIOs:

	 *  GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)

	 *  GPIO 23: Blue front LED off

	 *  GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)

	 */

};



&sata {

	pinctrl-0 = <&pmx_sata0_led_active

		     &pmx_sata1_led_active>;

	pinctrl-names = "default";

	status = "okay";

	nr-ports = <2>;

};



&uart0 {

	status = "okay";

};

arch/arm/boot/dts/orion5x-mv88f5182.dtsi

0 → 100644
+45 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2. This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */



#include "orion5x.dtsi"



/ {

	compatible = "marvell,orion5x-88f5182", "marvell,orion5x";



	soc {

		compatible = "marvell,orion5x-88f5182-mbus", "simple-bus";



		internal-regs {

			pinctrl: pinctrl@10000 {

				compatible = "marvell,88f5182-pinctrl";

				reg = <0x10000 0x8>, <0x10050 0x4>;



				pmx_sata0: pmx-sata0 {

					marvell,pins = "mpp12", "mpp14";

					marvell,function = "sata0";

				};



				pmx_sata1: pmx-sata1 {

					marvell,pins = "mpp13", "mpp15";

					marvell,function = "sata1";

				};

			};



			core_clk: core-clocks@10030 {

				compatible = "marvell,mv88f5182-core-clock";

				reg = <0x10010 0x4>;

				#clock-cells = <1>;

			};



			mbusc: mbus-controller@20000 {

				compatible = "marvell,mbus-controller";

				reg = <0x20000 0x100>, <0x1500 0x20>;

			};

		};

	};

};

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