Commit c130d2fd authored Apr 04, 2016 by Florian Fainelli Committed by Ralf Baechle May 13, 2016

MIPS: BMIPS: BMIPS5000 has I cache filing from D cache



BMIPS5000 and BMIPS52000 processors have their I-cache filling from the
D-cache. Since BMIPS_GENERIC does not provide (yet) a
cpu-feature-overrides.h file, this was not set anywhere, so make sure
the R4K cache detection takes care of that.

Fixes: d74b0172 ("MIPS: BMIPS: Add special cache handling in c-r4k.c")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13010/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 0201bfb1

arch/mips/mm/c-r4k.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -1317,6 +1317,10 @@ static void probe_pcache(void)
		c->icache.flags \|= MIPS_CACHE_IC_F_DC;
		break;

		case CPU_BMIPS5000:
		c->icache.flags \|= MIPS_CACHE_IC_F_DC;
		break;

		case CPU_LOONGSON2:
		/*
		* LOONGSON2 has 4 way icache, but when using indexed cache op,

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