Commit c12d410f authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
Browse files

drm/amd/powerplay: make mmhub pg bit configured by pg_flags 



The mmhub pg features enabling should be indicated by pg_flags.

Reported-by: default avatarLijo Lazar <Lijo.Lazar@amd.com>
Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarKenneth Feng <kenneth.feng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cb2a782e

drivers/gpu/drm/amd/amdgpu/nv.c

+2 −1
Original line number Diff line number Diff line
@@ -508,7 +508,8 @@ static int nv_common_early_init(void *handle) 
			AMD_CG_SUPPORT_BIF_MGCG |

			AMD_CG_SUPPORT_BIF_LS;

		adev->pg_flags = AMD_PG_SUPPORT_VCN |

			AMD_PG_SUPPORT_VCN_DPG;

			AMD_PG_SUPPORT_VCN_DPG |

			AMD_PG_SUPPORT_MMHUB;

		adev->external_rev_id = adev->rev_id + 0x1;

		break;

	default:

drivers/gpu/drm/amd/powerplay/navi10_ppt.c

+3 −1
Original line number Diff line number Diff line
@@ -325,7 +325,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, 
				| FEATURE_MASK(FEATURE_FAN_CONTROL_BIT)

				| FEATURE_MASK(FEATURE_THERMAL_BIT)

				| FEATURE_MASK(FEATURE_LED_DISPLAY_BIT)

				| FEATURE_MASK(FEATURE_MMHUB_PG_BIT)

				| FEATURE_MASK(FEATURE_ATHUB_PG_BIT)

				| FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT)

				| FEATURE_MASK(FEATURE_DS_GFXCLK_BIT)
@@ -346,6 +345,9 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, 
		*(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_FW_DSTATE_BIT);

	}



	if (smu->adev->pg_flags & AMD_PG_SUPPORT_MMHUB)

		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT);



	if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN)

		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT);

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