Commit c102671a authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branch 'pm-devfreq' 

* pm-devfreq: (24 commits)
  PM / devfreq: Add debugfs support with devfreq_summary file
  PM / devfreq: exynos: Rename Exynos to lowercase
  PM / devfreq: imx8m-ddrc: Fix inconsistent IS_ERR and PTR_ERR
  PM / devfreq: exynos-bus: Add error log when fail to get devfreq-event
  PM / devfreq: exynos-bus: Disable devfreq-event device when fails
  PM / devfreq: rk3399_dmc: Disable devfreq-event device when fails
  PM / devfreq: imx8m-ddrc: Remove unused defines
  PM / devfreq: exynos-bus: Reduce goto statements and remove unused headers
  PM / devfreq: rk3399_dmc: Add COMPILE_TEST and HAVE_ARM_SMCCC dependency
  PM / devfreq: rockchip-dfi: Convert to devm_platform_ioremap_resource
  PM / devfreq: rk3399_dmc: Add missing of_node_put()
  PM / devfreq: rockchip-dfi: Add missing of_node_put()
  PM / devfreq: Fix multiple kernel-doc warnings
  PM / devfreq: exynos-bus: Extract exynos_bus_profile_init_passive()
  PM / devfreq: exynos-bus: Extract exynos_bus_profile_init()
  PM / devfreq: Move declaration of DEVICE_ATTR_RW(min_freq)
  PM / devfreq: Move statistics to separate struct devfreq_stats
  PM / devfreq: Add clearing transitions stats
  PM / devfreq: Change time stats to 64-bit
  PM / devfreq: Add new name attribute for sysfs
  ...
parents c95d9c14 854e3349

Documentation/ABI/testing/sysfs-class-devfreq

+14 −4
Original line number Diff line number Diff line
@@ -7,6 +7,13 @@ Description: 
		The name of devfreq object denoted as ... is same as the

		name of device using devfreq.



What:		/sys/class/devfreq/.../name

Date:		November 2019

Contact:	Chanwoo Choi <cw00.choi@samsung.com>

Description:

		The /sys/class/devfreq/.../name shows the name of device

		of the corresponding devfreq object.



What:		/sys/class/devfreq/.../governor

Date:		September 2011

Contact:	MyungJoo Ham <myungjoo.ham@samsung.com>
@@ -48,12 +55,15 @@ What: /sys/class/devfreq/.../trans_stat 
Date:		October 2012

Contact:	MyungJoo Ham <myungjoo.ham@samsung.com>

Description:

		This ABI shows the statistics of devfreq behavior on a

		specific device. It shows the time spent in each state and

		the number of transitions between states.

		This ABI shows or clears the statistics of devfreq behavior

		on a specific device. It shows the time spent in each state

		and the number of transitions between states.

		In order to activate this ABI, the devfreq target device

		driver should provide the list of available frequencies

		with its profile.

		with its profile. If need to reset the statistics of devfreq

		behavior on a specific device, enter 0(zero) to 'trans_stat'

		as following:

			echo 0 > /sys/class/devfreq/.../trans_stat



What:		/sys/class/devfreq/.../userspace/set_freq

Date:		September 2011

Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml

0 → 100644
+72 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/memory-controllers/fsl/imx8m-ddrc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: i.MX8M DDR Controller



maintainers:

  - Leonard Crestez <leonard.crestez@nxp.com>



description:

  The DDRC block is integrated in i.MX8M for interfacing with DDR based

  memories.



  It supports switching between different frequencies at runtime but during

  this process RAM itself becomes briefly inaccessible so actual frequency

  switching is implemented by TF-A code which runs from a SRAM area.



  The Linux driver for the DDRC doesn't even map registers (they're included

  for the sake of "describing hardware"), it mostly just exposes firmware

  capabilities through standard Linux mechanism like devfreq and OPP tables.



properties:

  compatible:

    items:

      - enum:

        - fsl,imx8mn-ddrc

        - fsl,imx8mm-ddrc

        - fsl,imx8mq-ddrc

      - const: fsl,imx8m-ddrc



  reg:

    maxItems: 1

    description:

      Base address and size of DDRC CTL area.

      This is not currently mapped by the imx8m-ddrc driver.



  clocks:

    maxItems: 4



  clock-names:

    items:

      - const: core

      - const: pll

      - const: alt

      - const: apb



  operating-points-v2: true

  opp-table: true



required:

  - reg

  - compatible

  - clocks

  - clock-names



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/imx8mm-clock.h>

    ddrc: memory-controller@3d400000 {

        compatible = "fsl,imx8mm-ddrc", "fsl,imx8m-ddrc";

        reg = <0x3d400000 0x400000>;

        clock-names = "core", "pll", "alt", "apb";

        clocks = <&clk IMX8MM_CLK_DRAM_CORE>,

                 <&clk IMX8MM_DRAM_PLL>,

                 <&clk IMX8MM_CLK_DRAM_ALT>,

                 <&clk IMX8MM_CLK_DRAM_APB>;

        operating-points-v2 = <&ddrc_opp_table>;

    };

drivers/devfreq/Kconfig

+16 −5
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ config DEVFREQ_GOV_PASSIVE 
comment "DEVFREQ Drivers"



config ARM_EXYNOS_BUS_DEVFREQ

	tristate "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"

	tristate "ARM Exynos Generic Memory Bus DEVFREQ Driver"

	depends on ARCH_EXYNOS || COMPILE_TEST

	select DEVFREQ_GOV_SIMPLE_ONDEMAND

	select DEVFREQ_GOV_PASSIVE
@@ -91,6 +91,16 @@ config ARM_EXYNOS_BUS_DEVFREQ 
	  and adjusts the operating frequencies and voltages with OPP support.

	  This does not yet operate with optimal voltages.



config ARM_IMX8M_DDRC_DEVFREQ

	tristate "i.MX8M DDRC DEVFREQ Driver"

	depends on (ARCH_MXC && HAVE_ARM_SMCCC) || \

		(COMPILE_TEST && HAVE_ARM_SMCCC)

	select DEVFREQ_GOV_SIMPLE_ONDEMAND

	select DEVFREQ_GOV_USERSPACE

	help

	  This adds the DEVFREQ driver for the i.MX8M DDR Controller. It allows

	  adjusting DRAM frequency.



config ARM_TEGRA_DEVFREQ

	tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver"

	depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \
@@ -115,7 +125,8 @@ config ARM_TEGRA20_DEVFREQ 


config ARM_RK3399_DMC_DEVFREQ

	tristate "ARM RK3399 DMC DEVFREQ Driver"

	depends on ARCH_ROCKCHIP

	depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \

		(COMPILE_TEST && HAVE_ARM_SMCCC)

	select DEVFREQ_EVENT_ROCKCHIP_DFI

	select DEVFREQ_GOV_SIMPLE_ONDEMAND

	select PM_DEVFREQ_EVENT

drivers/devfreq/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o 


# DEVFREQ Drivers

obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ)	+= exynos-bus.o

obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ)	+= imx8m-ddrc.o

obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ)	+= rk3399_dmc.o

obj-$(CONFIG_ARM_TEGRA_DEVFREQ)		+= tegra30-devfreq.o

obj-$(CONFIG_ARM_TEGRA20_DEVFREQ)	+= tegra20-devfreq.o

drivers/devfreq/devfreq-event.c

+2 −2
Original line number Diff line number Diff line
@@ -346,9 +346,9 @@ EXPORT_SYMBOL_GPL(devfreq_event_add_edev); 


/**

 * devfreq_event_remove_edev() - Remove the devfreq-event device registered.

 * @dev		: the devfreq-event device

 * @edev	: the devfreq-event device

 *

 * Note that this function remove the registered devfreq-event device.

 * Note that this function removes the registered devfreq-event device.

 */

int devfreq_event_remove_edev(struct devfreq_event_dev *edev)

{

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