Commit c0f98d2f authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-misc-next-2020-11-05' of git://anongit.freedesktop.org/drm/drm-misc into drm-next



drm-misc-next for 5.11:

UAPI Changes:

Cross-subsystem Changes:

 - arch/arm64: Describe G12b GPU as coherent
 - iommu: Support coherency for Mali LPAE

Core Changes:

 - atomic: Pass full state to CRTC atomic_{check, begin, flush}(); Use
   atomic-state pointers
 - drm: Remove SCATTER_LIST_MAX_SEGMENT; Cleanups
 - doc: Document legacy_cursor_update better; cleanups
 - edid: Don't warn n EDIDs of zero
 - ttm: New backend allocation pool; Remove old page allocator; Rework
   no_retry handling; Replace flags with booleans in struct ttm_operation_ctx
 - vram-helper: Cleanups

 - fbdev: Cleanups
 - console: Store font size as unsigned value

Driver Changes:

 - ast: Support new display mode
 - amdgpu: Switch to new TTM allocator
 - hisilicon: Cleanups
 - nouveau: Switch to new TTM allocator; Fix include of swiotbl.h and
   limits.h; Use state helper instead of CRTC state pointer
 - panfrost: Support cache-coherent integrations; Fix mutex corruption on
   open/close; Cleanupse
 - qxl: Cleanups
 - radeon: Switch to new TTM allocator
 - ticdc: Fix build failure
 - vmwgfx: Switch to new TTM allocator
 - xlnx: Use dma_request_chan

 - fbdev/sh_mobile: Cleanups

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201105101641.GA13099@linux-uq9g
parents e047c7be 24e146cd
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+4 −0
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@@ -105,6 +105,10 @@ converted over to the new infrastructure.
One issue with the helpers is that they require that drivers handle completion
events for atomic commits correctly. But fixing these bugs is good anyway.

Somewhat related is the legacy_cursor_update hack, which should be replaced with
the new atomic_async_check/commit functionality in the helpers in drivers that
still look at that flag.

Contact: Daniel Vetter, respective driver maintainers

Level: Advanced
+4 −0
Original line number Diff line number Diff line
@@ -135,3 +135,7 @@
		};
	};
};

&mali {
	dma-coherent;
};
+0 −7
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@@ -182,13 +182,6 @@ config DRM_TTM
	  GPU memory types. Will be enabled automatically if a device driver
	  uses it.

config DRM_TTM_DMA_PAGE_POOL
	bool
	depends on DRM_TTM && (SWIOTLB || INTEL_IOMMU)
	default y
	help
	  Choose this if you need the TTM dma page pool

config DRM_VRAM_HELPER
	tristate
	depends on DRM
+1 −2
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@@ -404,8 +404,7 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
	struct ttm_operation_ctx ctx = {
		.interruptible = true,
		.no_wait_gpu = false,
		.resv = bo->tbo.base.resv,
		.flags = 0
		.resv = bo->tbo.base.resv
	};
	uint32_t domain;
	int r;
+4 −3
Original line number Diff line number Diff line
@@ -516,9 +516,10 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
	struct ttm_operation_ctx ctx = {
		.interruptible = (bp->type != ttm_bo_type_kernel),
		.no_wait_gpu = bp->no_wait_gpu,
		.resv = bp->resv,
		.flags = bp->type != ttm_bo_type_kernel ?
			TTM_OPT_FLAG_ALLOW_RES_EVICT : 0
		/* We opt to avoid OOM on system pages allocations */
		.gfp_retry_mayfail = true,
		.allow_res_evict = bp->type != ttm_bo_type_kernel,
		.resv = bp->resv
	};
	struct amdgpu_bo *bo;
	unsigned long page_align, size = bp->size;
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