Commit c0c46ca4 authored by José Roberto de Souza's avatar José Roberto de Souza Committed by Rodrigo Vivi
Browse files

drm/i915/aml: Add new Amber Lake PCI ID 



This new AML PCI ID uses the same gen graphics as Coffe Lake not a
Kaby Lake one like the other AMLs.

So to make it more explicit renaming INTEL_AML_GT2_IDS to
INTEL_AML_KBL_GT2_IDS and naming this id as INTEL_AML_CFL_GT2_IDS.

v2:
- missed add new AML macro to INTEL_CFL_IDS()
- added derivated platform initials to AML macros

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927010650.22731-1-jose.souza@intel.com
parent 0b4bf7ca

drivers/gpu/drm/i915/i915_pci.c

+2 −1
Original line number Diff line number Diff line
@@ -660,7 +660,7 @@ static const struct pci_device_id pciidlist[] = { 
	INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info),

	INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),

	INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info),

	INTEL_AML_GT2_IDS(&intel_kabylake_gt2_info),

	INTEL_AML_KBL_GT2_IDS(&intel_kabylake_gt2_info),

	INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),

	INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),

	INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
@@ -668,6 +668,7 @@ static const struct pci_device_id pciidlist[] = { 
	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),

	INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),

	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),

	INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info),

	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),

	INTEL_CNL_IDS(&intel_cannonlake_info),

	INTEL_ICL_11_IDS(&intel_icelake_11_info),

include/drm/i915_pciids.h

+8 −3
Original line number Diff line number Diff line
@@ -365,16 +365,20 @@ 
	INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */



/* AML/KBL Y GT2 */

#define INTEL_AML_GT2_IDS(info) \

#define INTEL_AML_KBL_GT2_IDS(info) \

	INTEL_VGA_DEVICE(0x591C, info),  /* ULX GT2 */ \

	INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */



/* AML/CFL Y GT2 */

#define INTEL_AML_CFL_GT2_IDS(info) \

	INTEL_VGA_DEVICE(0x87CA, info)



#define INTEL_KBL_IDS(info) \

	INTEL_KBL_GT1_IDS(info), \

	INTEL_KBL_GT2_IDS(info), \

	INTEL_KBL_GT3_IDS(info), \

	INTEL_KBL_GT4_IDS(info), \

	INTEL_AML_GT2_IDS(info)

	INTEL_AML_KBL_GT2_IDS(info)



/* CFL S */

#define INTEL_CFL_S_GT1_IDS(info) \
@@ -427,7 +431,8 @@ 
	INTEL_CFL_U_GT3_IDS(info), \

	INTEL_WHL_U_GT1_IDS(info), \

	INTEL_WHL_U_GT2_IDS(info), \

	INTEL_WHL_U_GT3_IDS(info)

	INTEL_WHL_U_GT3_IDS(info), \

	INTEL_AML_CFL_GT2_IDS(info)



/* CNL */

#define INTEL_CNL_IDS(info) \

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