Commit c0b0bb6e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-sh73a0-multiplatform-for-v4.1' of... 

Merge tag 'renesas-sh73a0-multiplatform-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/multiplatform

Merge "Renesas ARM Based SoC sh73a0 Multiplatform Updates for v4.1" from Simon
Horman:

* Add multiplatform support to sh73a0 and its kzm9g board
* Use Bus State Controller to enable ethernet for multiplatform sh73a0/kzm9g
* Add PM domain support to multiplatform sh73a0

* tag 'renesas-sh73a0-multiplatform-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

: (43 commits)
  ARM: shmobile: sh73a0: Remove restart callback
  ARM: shmobile: sh73a0 dtsi: Add PM domain support
  ARM: shmobile: sh73a0: Remove unused sh73a0_add_standard_devices_dt()
  ARM: shmobile: sh73a0 dtsi: Add Cortex-A9 TWD node
  ARM: shmobile: kzm9g-reference: Remove board C code and DT file
  ARM: shmobile: kzm9g dts: Move Ethernet node to BSC
  ARM: shmobile: sh73a0 dtsi: Add Bus State Controller node
  ARM: shmobile: kzm9g: Build DTS for Multiplatform
  ARM: shmobile: kzm9g dts: Sync with kzm9g-reference dts
  ARM: shmobile: sh73a0: Add Multiplatform support
  ARM: shmobile: sh73a0: Introduce generic setup callback
  ARM: shmobile: r8a7794: add SDHI DT support
  ARM: shmobile: r8a7790: add ADSP clocks
  ARM: shmobile: r8a7791: add ADSP clocks
  ARM: shmobile: henninger: add CAN0 DT support
  ARM: shmobile: r8a7791: add CAN DT support
  ARM: shmobile: r8a7791: add CAN clocks
  ARM: shmobile: r8a7790: add CAN DT support
  ARM: shmobile: r8a7790: add CAN clocks
  ARM: shmobile: emev2-kzm9d dts: Add PFC information for uart1
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents d36d520a 3c7585b9

Documentation/devicetree/bindings/arm/shmobile.txt

+0 −2
Original line number Diff line number Diff line
@@ -53,8 +53,6 @@ Boards: 
    compatible = "renesas,kzm9d", "renesas,emev2"

  - Kyoto Microcomputer Co. KZM-A9-GT

    compatible = "renesas,kzm9g", "renesas,sh73a0"

  - Kyoto Microcomputer Co. KZM-A9-GT - Reference Device Tree Implementation

    compatible = "renesas,kzm9g-reference", "renesas,sh73a0"

  - Lager (RTP0RC7790SEB00010S)

    compatible = "renesas,lager", "renesas,r8a7790"

  - Marzen

arch/arm/boot/dts/Makefile

+3 −3
Original line number Diff line number Diff line
@@ -468,8 +468,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \ 
	r8a7778-bockw.dtb \

	r8a7778-bockw-reference.dtb \

	r8a7779-marzen.dtb \

	sh73a0-kzm9g.dtb \

	sh73a0-kzm9g-reference.dtb

	sh73a0-kzm9g.dtb

dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \

	emev2-kzm9d.dtb \

	r7s72100-genmai.dtb \
@@ -480,7 +479,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \ 
	r8a7790-lager.dtb \

	r8a7791-henninger.dtb \

	r8a7791-koelsch.dtb \

	r8a7794-alt.dtb

	r8a7794-alt.dtb \

	sh73a0-kzm9g.dtb

dtb-$(CONFIG_ARCH_SOCFPGA) += \

	socfpga_arria5_socdk.dtb \

	socfpga_arria10_socdk.dtb \

arch/arm/boot/dts/emev2-kzm9d.dts

+13 −0
Original line number Diff line number Diff line
@@ -94,3 +94,16 @@ 
		vdd33a-supply = <&reg_3p3v>;

	};

};



&pfc {

	uart1_pins: uart@e1030000 {

		renesas,groups = "uart1_ctrl", "uart1_data";

		renesas,function = "uart1";

	};

};



&uart1 {

	pinctrl-0 = <&uart1_pins>;

	pinctrl-names = "default";

	status = "okay";

};

arch/arm/boot/dts/emev2.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -169,12 +169,18 @@ 
		clock-names = "sclk";

	};



	pfc: pfc@e0140200 {

		compatible = "renesas,pfc-emev2";

		reg = <0xe0140200 0x100>;

	};



	gpio0: gpio@e0050000 {

		compatible = "renesas,em-gio";

		reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;

		interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>,

			     <0 68 IRQ_TYPE_LEVEL_HIGH>;

		gpio-controller;

		gpio-ranges = <&pfc 0 0 32>;

		#gpio-cells = <2>;

		ngpios = <32>;

		interrupt-controller;
@@ -186,6 +192,7 @@ 
		interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>,

			     <0 70 IRQ_TYPE_LEVEL_HIGH>;

		gpio-controller;

		gpio-ranges = <&pfc 0 32 32>;

		#gpio-cells = <2>;

		ngpios = <32>;

		interrupt-controller;
@@ -197,6 +204,7 @@ 
		interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>,

			     <0 72 IRQ_TYPE_LEVEL_HIGH>;

		gpio-controller;

		gpio-ranges = <&pfc 0 64 32>;

		#gpio-cells = <2>;

		ngpios = <32>;

		interrupt-controller;
@@ -208,6 +216,7 @@ 
		interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>,

			     <0 74 IRQ_TYPE_LEVEL_HIGH>;

		gpio-controller;

		gpio-ranges = <&pfc 0 96 32>;

		#gpio-cells = <2>;

		ngpios = <32>;

		interrupt-controller;
@@ -219,6 +228,7 @@ 
		interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>,

			     <0 76 IRQ_TYPE_LEVEL_HIGH>;

		gpio-controller;

		gpio-ranges = <&pfc 0 128 31>;

		#gpio-cells = <2>;

		ngpios = <31>;

		interrupt-controller;

arch/arm/boot/dts/r8a7740.dtsi

+78 −1
Original line number Diff line number Diff line
@@ -431,6 +431,18 @@ 
			clock-frequency = <27000000>;

			clock-output-names = "dv";

		};

		fmsick_clk: fmsick_clk {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <0>;

			clock-output-names = "fmsick";

		};

		fmsock_clk: fmsock_clk {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <0>;

			clock-output-names = "fmsock";

		};

		fsiack_clk: fsiack_clk {

			compatible = "fixed-clock";

			#clock-cells = <0>;
@@ -459,13 +471,78 @@ 
		};



		/* Variable factor clocks (DIV6) */

		vclk1_clk: vclk1_clk@e6150008 {

			compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";

			reg = <0xe6150008 4>;

			clocks = <&pllc1_div2_clk>, <0>, <&dv_clk>,

				 <&cpg_clocks R8A7740_CLK_USB24S>,

				 <&extal1_div2_clk>, <&extalr_clk>, <0>,

				 <0>;

			#clock-cells = <0>;

			clock-output-names = "vclk1";

		};

		vclk2_clk: vclk2_clk@e615000c {

			compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";

			reg = <0xe615000c 4>;

			clocks = <&pllc1_div2_clk>, <0>, <&dv_clk>,

				 <&cpg_clocks R8A7740_CLK_USB24S>,

				 <&extal1_div2_clk>, <&extalr_clk>, <0>,

				 <0>;

			#clock-cells = <0>;

			clock-output-names = "vclk2";

		};

		fmsi_clk: fmsi_clk@e6150010 {

			compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";

			reg = <0xe6150010 4>;

			clocks = <&pllc1_div2_clk>, <&fmsick_clk>, <0>, <0>;

			#clock-cells = <0>;

			clock-output-names = "fmsi";

		};

		fmso_clk: fmso_clk@e6150014 {

			compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";

			reg = <0xe6150014 4>;

			clocks = <&pllc1_div2_clk>, <&fmsock_clk>, <0>, <0>;

			#clock-cells = <0>;

			clock-output-names = "fmso";

		};

		fsia_clk: fsia_clk@e6150018 {

			compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";

			reg = <0xe6150018 4>;

			clocks = <&pllc1_div2_clk>, <&fsiack_clk>, <0>, <0>;

			#clock-cells = <0>;

			clock-output-names = "fsia";

		};

		sub_clk: sub_clk@e6150080 {

			compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";

			reg = <0xe6150080 4>;

			clocks = <&pllc1_div2_clk>;

			clocks = <&pllc1_div2_clk>,

				 <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;

			#clock-cells = <0>;

			clock-output-names = "sub";

		};

		spu_clk: spu_clk@e6150084 {

			compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";

			reg = <0xe6150084 4>;

			clocks = <&pllc1_div2_clk>,

				 <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;

			#clock-cells = <0>;

			clock-output-names = "spu";

		};

		vou_clk: vou_clk@e6150088 {

			compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";

			reg = <0xe6150088 4>;

			clocks = <&pllc1_div2_clk>, <&extal1_clk>, <&dv_clk>,

				 <0>;

			#clock-cells = <0>;

			clock-output-names = "vou";

		};

		stpro_clk: stpro_clk@e615009c {

			compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";

			reg = <0xe615009c 4>;

			clocks = <&cpg_clocks R8A7740_CLK_PLLC0>;

			#clock-cells = <0>;

			clock-output-names = "stpro";

		};



		/* Fixed factor clocks */

		pllc1_div2_clk: pllc1_div2_clk {

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