Commit c014e076 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/gt: Do not attempt to reprogram IA/ring frequencies for dgfx



For dgfx, we do not need to reconfigure the IA/ring frequencies of the
main processors as they are distinct devices.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200219130119.1457693-1-chris@chris-wilson.co.uk
parent bd3d1f86
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+4 −2
Original line number Diff line number Diff line
@@ -50,6 +50,9 @@ static bool get_ia_constants(struct intel_llc *llc,
	struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
	struct intel_rps *rps = &llc_to_gt(llc)->rps;

	if (!HAS_LLC(i915) || IS_DGFX(i915))
		return false;

	if (rps->max_freq <= rps->min_freq)
		return false;

@@ -147,7 +150,6 @@ static void gen6_update_ring_freq(struct intel_llc *llc)

void intel_llc_enable(struct intel_llc *llc)
{
	if (HAS_LLC(llc_to_gt(llc)->i915))
	gen6_update_ring_freq(llc);
}

+2 −9
Original line number Diff line number Diff line
@@ -18,10 +18,8 @@ static int gen6_verify_ring_freq(struct intel_llc *llc)

	wakeref = intel_runtime_pm_get(llc_to_gt(llc)->uncore->rpm);

	if (!get_ia_constants(llc, &consts)) {
		err = -ENODEV;
	if (!get_ia_constants(llc, &consts))
		goto out_rpm;
	}

	for (gpu_freq = consts.min_gpu_freq;
	     gpu_freq <= consts.max_gpu_freq;
@@ -71,10 +69,5 @@ out_rpm:

int st_llc_verify(struct intel_llc *llc)
{
	int err = 0;

	if (HAS_LLC(llc_to_gt(llc)->i915))
		err = gen6_verify_ring_freq(llc);

	return err;
	return gen6_verify_ring_freq(llc);
}