Commit c00db496 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Remove superfluous GEN8_LR_CONTEXT_ALIGN 



As GEN8_LR_CONTEXT_ALIGN is I915_GTT_MIN_ALIGNMENT is it functionally
equivalent to 0, and we will not be able to reduce the min-alignment for
the GTT, so passing 0 is and will remain equivalent.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727092947.1953-1-chris@chris-wilson.co.uk
parent 7a859c65

drivers/gpu/drm/i915/intel_lrc.c

+1 −1
Original line number Diff line number Diff line
@@ -1306,7 +1306,7 @@ static int __context_pin(struct i915_gem_context *ctx, struct i915_vma *vma) 
	if (ctx->ggtt_offset_bias)

		flags |= PIN_OFFSET_BIAS | ctx->ggtt_offset_bias;



	return i915_vma_pin(vma, 0, GEN8_LR_CONTEXT_ALIGN, flags);

	return i915_vma_pin(vma, 0, 0, flags);

}



static struct intel_context *

drivers/gpu/drm/i915/intel_lrc.h

+0 −2
Original line number Diff line number Diff line
@@ -27,8 +27,6 @@ 
#include "intel_ringbuffer.h"

#include "i915_gem_context.h"



#define GEN8_LR_CONTEXT_ALIGN I915_GTT_MIN_ALIGNMENT



/* Execlists regs */

#define RING_ELSP(engine)			_MMIO((engine)->mmio_base + 0x230)

#define RING_EXECLIST_STATUS_LO(engine)		_MMIO((engine)->mmio_base + 0x234)

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