drm/amdgpu: implement soft_recovery for gfx10 (bff1a611) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+14 −0

Original line number	Diff line number	Diff line
		@@ -4914,6 +4914,19 @@ static void gfx_v10_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring,
		ref, mask);
		}

		static void gfx_v10_0_ring_soft_recovery(struct amdgpu_ring *ring,
		unsigned vmid)
		{
		struct amdgpu_device *adev = ring->adev;
		uint32_t value = 0;

		value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03);
		value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01);
		value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1);
		value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid);
		WREG32_SOC15(GC, 0, mmSQ_CMD, value);
		}

		static void
		gfx_v10_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,
		uint32_t me, uint32_t pipe,
		@@ -5305,6 +5318,7 @@ static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_gfx = {
		.emit_wreg = gfx_v10_0_ring_emit_wreg,
		.emit_reg_wait = gfx_v10_0_ring_emit_reg_wait,
		.emit_reg_write_reg_wait = gfx_v10_0_ring_emit_reg_write_reg_wait,
		.soft_recovery = gfx_v10_0_ring_soft_recovery,
		};

		static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_compute = {