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Merge tag 'imx-clk-5.5' of...
Merge tag 'imx-clk-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-imx Pull i.MX clk updates from Shawn Guo: - Make 1443X/1416X PLL clock structure common for reusing among i.MX8 SoCs - A couple of imx7ulp clock multiplexer option corrections. - Drop IMX7ULP_CLK_MIPI_PLL clock, as it's a MIPI DSI local clock and shouldn't be used externally - Add VIDEO2_PLL clock for imx8mq which is needed by DCSS when high resolutions are used - Add missing gate clock for pll1/2 fixed dividers on i.MX8 SoCs - Register SYS_PLL1 and SYS_PLL2 as fixed clock rather than pll14xx type of clock - Use imx_obtain_fixed_clk_hw() to simplify i.MX6/7/8 clock driver code a little bit - One cosmetic change on clk-pll14xx code to make variables static * tag 'imx-clk-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: clk: imx: imx8mq: fix sys3_pll_out_sels clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code clk: imx7ulp: Correct DDR clock mux options clk: imx7ulp: Correct system clock source option #7 clk: imx: imx8mq: mark sys1/2_pll as fixed clock clk: imx: imx8mn: mark sys_pll1/2 as fixed clock clk: imx: imx8mm: mark sys_pll1/2 as fixed clock clk: imx8mn: Define gates for pll1/2 fixed dividers clk: imx8mm: Define gates for pll1/2 fixed dividers clk: imx8mq: Define gates for pll1/2 fixed dividers clk: imx: clk-pll14xx: Make two variables static clk: imx8mq: Add VIDEO2_PLL clock clk: imx8mn: Use common 1443X/1416X PLL clock structure clk: imx8mm: Move 1443X/1416X PLL clock structure to common place clk: imx: pll14xx: Fix quick switch of S/K parameter