Commit bfcea520 authored by Feifei Xu's avatar Feifei Xu Committed by Alex Deucher
Browse files

drm/amdgpu:change VEGA booting with firmware loaded by PSP 



With PSP firmware loading, TMR mc address is supposed to be used.

Signed-off-by: default avatarJames Zhu <James.Zhu@amd.com>
Acked-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d4e83843

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

+9 −4
Original line number Diff line number Diff line
@@ -671,9 +671,14 @@ static void uvd_v7_0_mc_resume(struct amdgpu_device *adev) 
			continue;

		if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {

			WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

				lower_32_bits(adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].mc_addr));

				i == 0 ?

				adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].tmr_mc_addr_lo:

				adev->firmware.ucode[AMDGPU_UCODE_ID_UVD1].tmr_mc_addr_lo);

			WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

				upper_32_bits(adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].mc_addr));

				i == 0 ?

				adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].tmr_mc_addr_hi:

				adev->firmware.ucode[AMDGPU_UCODE_ID_UVD1].tmr_mc_addr_hi);

			WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, 0);

			offset = 0;

		} else {

			WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,
@@ -681,10 +686,10 @@ static void uvd_v7_0_mc_resume(struct amdgpu_device *adev) 
			WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

				upper_32_bits(adev->uvd.inst[i].gpu_addr));

			offset = size;

		}



			WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0,

					AMDGPU_UVD_FIRMWARE_OFFSET >> 3);

		}



		WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE0, size);



		WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

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