Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (bfb7bfef) · Commits · 戴 / test

drivers/irqchip/Kconfig

+2 −2

Original line number	Diff line number	Diff line
		@@ -158,8 +158,8 @@ config PIC32_EVIC
		select IRQ_DOMAIN

		config JCORE_AIC
		bool "J-Core integrated AIC"
		depends on OF && (SUPERH \|\| COMPILE_TEST)
		bool "J-Core integrated AIC" if COMPILE_TEST
		depends on OF
		select IRQ_DOMAIN
		help
		Support for the J-Core integrated AIC.

drivers/irqchip/irq-eznps.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -135,7 +135,7 @@ static const struct irq_domain_ops nps400_irq_ops = {
		static int __init nps400_of_init(struct device_node *node,
		struct device_node *parent)
		{
		static struct irq_domain *nps400_root_domain;
		struct irq_domain *nps400_root_domain;

		if (parent) {
		pr_err("DeviceTree incore ic not a root irq controller\n");

drivers/irqchip/irq-gic-v3-its.c

+5 −5

Original line number	Diff line number	Diff line
		@@ -1023,7 +1023,7 @@ static void its_free_tables(struct its_node *its)

		static int its_alloc_tables(struct its_node *its)
		{
		u64 typer = readq_relaxed(its->base + GITS_TYPER);
		u64 typer = gic_read_typer(its->base + GITS_TYPER);
		u32 ids = GITS_TYPER_DEVBITS(typer);
		u64 shr = GITS_BASER_InnerShareable;
		u64 cache = GITS_BASER_WaWb;
		@@ -1198,7 +1198,7 @@ static void its_cpu_init_collection(void)
		* We now have to bind each collection to its target
		* redistributor.
		*/
		if (readq_relaxed(its->base + GITS_TYPER) & GITS_TYPER_PTA) {
		if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) {
		/*
		* This ITS wants the physical address of the
		* redistributor.
		@@ -1208,7 +1208,7 @@ static void its_cpu_init_collection(void)
		/*
		* This ITS wants a linear CPU number.
		*/
		target = readq_relaxed(gic_data_rdist_rd_base() + GICR_TYPER);
		target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER);
		target = GICR_TYPER_CPU_NUMBER(target) << 16;
		}

		@@ -1691,7 +1691,7 @@ static int __init its_probe_one(struct resource *res,
		INIT_LIST_HEAD(&its->its_device_list);
		its->base = its_base;
		its->phys_base = res->start;
		its->ite_size = ((readl_relaxed(its_base + GITS_TYPER) >> 4) & 0xf) + 1;
		its->ite_size = ((gic_read_typer(its_base + GITS_TYPER) >> 4) & 0xf) + 1;
		its->numa_node = numa_node;

		its->cmd_base = kzalloc(ITS_CMD_QUEUE_SZ, GFP_KERNEL);
		@@ -1763,7 +1763,7 @@ out_unmap:

		static bool gic_rdists_supports_plpis(void)
		{
		return !!(readl_relaxed(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS);
		return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS);
		}

		int its_cpu_init(void)

drivers/irqchip/irq-gic.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1279,7 +1279,7 @@ static bool gic_check_eoimode(struct device_node node, void __iomem *base)
		*/
		*base += 0xf000;
		cpuif_res.start += 0xf000;
		pr_warn("GIC: Adjusting CPU interface base to %pa",
		pr_warn("GIC: Adjusting CPU interface base to %pa\n",
		&cpuif_res.start);
		}

include/linux/irqchip/arm-gic-v3.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -290,7 +290,7 @@
		#define GITS_BASER_TYPE_SHIFT (56)
		#define GITS_BASER_TYPE(r) (((r) >> GITS_BASER_TYPE_SHIFT) & 7)
		#define GITS_BASER_ENTRY_SIZE_SHIFT (48)
		#define GITS_BASER_ENTRY_SIZE(r) ((((r) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0xff) + 1)
		#define GITS_BASER_ENTRY_SIZE(r) ((((r) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0x1f) + 1)
		#define GITS_BASER_SHAREABILITY_SHIFT (10)
		#define GITS_BASER_InnerShareable \
		GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable)

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