Commit bf7b4c1b authored by Helge Deller's avatar Helge Deller
Browse files

parisc: Add CPU topology support 



Add topology support, including multi-core scheduler support on
PA8800/PA8900 CPUs and enhanced output in /proc/cpuinfo, e.g.
lscpu now reports on a single-socket, dual-core machine:

Architecture:          parisc64
CPU(s):                2
On-line CPU(s) list:   0,1
Thread(s) per core:    1
Core(s) per socket:    2
Socket(s):             1
CPU family:            PA-RISC 2.0
Model name:            PA8800 (Mako)

Signed-off-by: default avatarHelge Deller <deller@gmx.de>
parent 05f016d2

arch/parisc/Kconfig

+16 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ config PARISC 
	select GENERIC_PCI_IOMAP

	select ARCH_HAVE_NMI_SAFE_CMPXCHG

	select GENERIC_SMP_IDLE_THREAD

	select GENERIC_CPU_DEVICES

	select GENERIC_STRNCPY_FROM_USER

	select SYSCTL_ARCH_UNALIGN_ALLOW

	select SYSCTL_EXCEPTION_TRACE
@@ -288,6 +289,21 @@ config SMP 


	  If you don't know what to do here, say N.



config PARISC_CPU_TOPOLOGY

	bool "Support cpu topology definition"

	depends on SMP

	default y

	help

	  Support PARISC cpu topology definition.



config SCHED_MC

	bool "Multi-core scheduler support"

	depends on PARISC_CPU_TOPOLOGY && PA8X00

	help

	  Multi-core scheduler support improves the CPU scheduler's decision

	  making when dealing with multi-core CPU chips at a cost of slightly

	  increased overhead in some places. If unsure say N here.



config IRQSTACKS

	bool "Use separate kernel stacks when processing interrupts"

	default y

arch/parisc/include/asm/topology.h

0 → 100644
+36 −0
Original line number Diff line number Diff line 
#ifndef _ASM_PARISC_TOPOLOGY_H

#define _ASM_PARISC_TOPOLOGY_H



#ifdef CONFIG_PARISC_CPU_TOPOLOGY



#include <linux/cpumask.h>



struct cputopo_parisc {

	int thread_id;

	int core_id;

	int socket_id;

	cpumask_t thread_sibling;

	cpumask_t core_sibling;

};



extern struct cputopo_parisc cpu_topology[NR_CPUS];



#define topology_physical_package_id(cpu)	(cpu_topology[cpu].socket_id)

#define topology_core_id(cpu)		(cpu_topology[cpu].core_id)

#define topology_core_cpumask(cpu)	(&cpu_topology[cpu].core_sibling)

#define topology_sibling_cpumask(cpu)	(&cpu_topology[cpu].thread_sibling)



void init_cpu_topology(void);

void store_cpu_topology(unsigned int cpuid);

const struct cpumask *cpu_coregroup_mask(int cpu);



#else



static inline void init_cpu_topology(void) { }

static inline void store_cpu_topology(unsigned int cpuid) { }



#endif



#include <asm-generic/topology.h>



#endif /* _ASM_ARM_TOPOLOGY_H */

arch/parisc/kernel/Makefile

+2 −2
Original line number Diff line number Diff line
@@ -9,8 +9,7 @@ obj-y := cache.o pacache.o setup.o pdt.o traps.o time.o irq.o \ 
		   pa7300lc.o syscall.o entry.o sys_parisc.o firmware.o \

		   ptrace.o hardware.o inventory.o drivers.o \

		   signal.o hpmc.o real2.o parisc_ksyms.o unaligned.o \

		   process.o processor.o pdc_cons.o pdc_chassis.o unwind.o \

		   topology.o

		   process.o processor.o pdc_cons.o pdc_chassis.o unwind.o



ifdef CONFIG_FUNCTION_TRACER

# Do not profile debug and lowlevel utilities
@@ -30,5 +29,6 @@ obj-$(CONFIG_AUDIT) += audit.o 
obj64-$(CONFIG_AUDIT)	+= compat_audit.o

# only supported for PCX-W/U in 64-bit mode at the moment

obj-$(CONFIG_64BIT)	+= perf.o perf_asm.o $(obj64-y)

obj-$(CONFIG_PARISC_CPU_TOPOLOGY)	+= topology.o

obj-$(CONFIG_FUNCTION_TRACER)		+= ftrace.o

obj-$(CONFIG_FUNCTION_GRAPH_TRACER)	+= ftrace.o

arch/parisc/kernel/processor.c

+13 −0
Original line number Diff line number Diff line
@@ -184,6 +184,9 @@ static int __init processor_probe(struct parisc_device *dev) 
	p->txn_addr = txn_addr;	/* save CPU IRQ address */

	p->cpu_num = cpu_info.cpu_num;

	p->cpu_loc = cpu_info.cpu_loc;



	store_cpu_topology(cpuid);



#ifdef CONFIG_SMP

	/*

	** FIXME: review if any other initialization is clobbered
@@ -325,6 +328,8 @@ int __init init_per_cpu(int cpunum) 
	set_firmware_width();

	ret = pdc_coproc_cfg(&coproc_cfg);



	store_cpu_topology(cpunum);



	if(ret >= 0 && coproc_cfg.ccr_functional) {

		mtctl(coproc_cfg.ccr_functional, 10);  /* 10 == Coprocessor Control Reg */
@@ -388,6 +393,14 @@ show_cpuinfo (struct seq_file *m, void *v) 
				 boot_cpu_data.cpu_hz / 1000000,

				 boot_cpu_data.cpu_hz % 1000000  );



#ifdef CONFIG_PARISC_CPU_TOPOLOGY

		seq_printf(m, "physical id\t: %d\n",

				topology_physical_package_id(cpu));

		seq_printf(m, "siblings\t: %d\n",

				cpumask_weight(topology_core_cpumask(cpu)));

		seq_printf(m, "core id\t\t: %d\n", topology_core_id(cpu));

#endif



		seq_printf(m, "capabilities\t:");

		if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)

			seq_puts(m, " os32");

arch/parisc/kernel/setup.c

+2 −0
Original line number Diff line number Diff line
@@ -408,6 +408,8 @@ void __init start_parisc(void) 


	cpunum = smp_processor_id();



	init_cpu_topology();



	set_firmware_width_unlocked();



	ret = pdc_coproc_cfg_unlocked(&coproc_cfg);

CRA Git | Maintained and supported by SUSTech CRA and CCSE