Commit bf6b7661 authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Michael Ellerman
Browse files

powerpc/book3s64/radix: Add kernel command line option to disable radix GTSE 



This adds a kernel command line option that can be used to disable GTSE support.
Disabling GTSE implies kernel will make hcalls to invalidate TLB entries.

This was done so that we can do VM migration between configs that enable/disable
GTSE support via hypervisor. To migrate a VM from a system that supports
GTSE to a system that doesn't, we can boot the guest with
radix_hcall_invalidate=on, thereby forcing the guest to use hcalls for TLB
invalidates.

The check for hcall availability is done in pSeries_setup_arch so that
the panic message appears on the console. This should only happen on
a hypervisor that doesn't force the guest to hash translation even
though it can't handle the radix GTSE=0 request via CAS. With
radix_hcall_invalidate=on if the hypervisor doesn't support hcall_rpt_invalidate
hcall it should force the LPAR to hash translation.

Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Tested-by: default avatarBharata B Rao <bharata@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200727085908.420806-1-aneesh.kumar@linux.ibm.com
parent a5a8b258

Documentation/admin-guide/kernel-parameters.txt

+4 −0
Original line number Diff line number Diff line
@@ -896,6 +896,10 @@ 
	disable_radix	[PPC]

			Disable RADIX MMU mode on POWER9



	radix_hcall_invalidate=on  [PPC/PSERIES]

			Disable RADIX GTSE feature and use hcall for TLB

			invalidate.



	disable_tlbie	[PPC]

			Disable TLBIE instruction. Currently does not work

			with KVM, with HASH MMU, or with coherent accelerators.

arch/powerpc/include/asm/firmware.h

+3 −1
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ 
#define FW_FEATURE_PAPR_SCM 	ASM_CONST(0x0000002000000000)

#define FW_FEATURE_ULTRAVISOR	ASM_CONST(0x0000004000000000)

#define FW_FEATURE_STUFF_TCE	ASM_CONST(0x0000008000000000)

#define FW_FEATURE_RPT_INVALIDATE ASM_CONST(0x0000010000000000)



#ifndef __ASSEMBLY__
@@ -71,7 +72,8 @@ enum { 
		FW_FEATURE_TYPE1_AFFINITY | FW_FEATURE_PRRN |

		FW_FEATURE_HPT_RESIZE | FW_FEATURE_DRMEM_V2 |

		FW_FEATURE_DRC_INFO | FW_FEATURE_BLOCK_REMOVE |

		FW_FEATURE_PAPR_SCM | FW_FEATURE_ULTRAVISOR,

		FW_FEATURE_PAPR_SCM | FW_FEATURE_ULTRAVISOR |

		FW_FEATURE_RPT_INVALIDATE,

	FW_FEATURE_PSERIES_ALWAYS = 0,

	FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_ULTRAVISOR,

	FW_FEATURE_POWERNV_ALWAYS = 0,

arch/powerpc/kernel/prom_init.c

+9 −4
Original line number Diff line number Diff line
@@ -169,6 +169,7 @@ static unsigned long __prombss prom_tce_alloc_end; 


#ifdef CONFIG_PPC_PSERIES

static bool __prombss prom_radix_disable;

static bool __prombss prom_radix_gtse_disable;

static bool __prombss prom_xive_disable;

#endif
@@ -823,6 +824,12 @@ static void __init early_cmdline_parse(void) 
	if (prom_radix_disable)

		prom_debug("Radix disabled from cmdline\n");



	opt = prom_strstr(prom_cmd_line, "radix_hcall_invalidate=on");

	if (opt) {

		prom_radix_gtse_disable = true;

		prom_debug("Radix GTSE disabled from cmdline\n");

	}



	opt = prom_strstr(prom_cmd_line, "xive=off");

	if (opt) {

		prom_xive_disable = true;
@@ -1285,10 +1292,8 @@ static void __init prom_parse_platform_support(u8 index, u8 val, 
		prom_parse_mmu_model(val & OV5_FEAT(OV5_MMU_SUPPORT), support);

		break;

	case OV5_INDX(OV5_RADIX_GTSE): /* Radix Extensions */

		if (val & OV5_FEAT(OV5_RADIX_GTSE)) {

			prom_debug("Radix - GTSE supported\n");

			support->radix_gtse = true;

		}

		if (val & OV5_FEAT(OV5_RADIX_GTSE))

			support->radix_gtse = !prom_radix_gtse_disable;

		break;

	case OV5_INDX(OV5_XIVE_SUPPORT): /* Interrupt mode */

		prom_parse_xive_model(val & OV5_FEAT(OV5_XIVE_SUPPORT),

arch/powerpc/mm/init_64.c

+0 −1
Original line number Diff line number Diff line
@@ -406,7 +406,6 @@ static void __init early_check_vec5(void) 
		}

		if (!(vec5[OV5_INDX(OV5_RADIX_GTSE)] &

						OV5_FEAT(OV5_RADIX_GTSE))) {

			pr_warn("WARNING: Hypervisor doesn't support RADIX with GTSE\n");

			cur_cpu_spec->mmu_features &= ~MMU_FTR_GTSE;

		} else

			cur_cpu_spec->mmu_features |= MMU_FTR_GTSE;

arch/powerpc/platforms/pseries/firmware.c

+1 −0
Original line number Diff line number Diff line
@@ -65,6 +65,7 @@ hypertas_fw_features_table[] = { 
	{FW_FEATURE_HPT_RESIZE,		"hcall-hpt-resize"},

	{FW_FEATURE_BLOCK_REMOVE,	"hcall-block-remove"},

	{FW_FEATURE_PAPR_SCM,		"hcall-scm"},

	{FW_FEATURE_RPT_INVALIDATE,	"hcall-rpt-invalidate"},

};



/* Build up the firmware features bitmask using the contents of

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