Commit bf40bf5e authored by Paul Cercueil's avatar Paul Cercueil Committed by Thomas Bogendoerfer
Browse files

MIPS: ingenic: DTS: Add nodes for the watchdog/PWM/OST



Add the TCU nodes to the JZ4780, JZ4770 and JZ4740 devicetree files.

Signed-off-by: default avatarPaul Cercueil <paul@crapouillou.net>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent cf2e6b8e
Loading
Loading
Loading
Loading
+14 −0
Original line number Diff line number Diff line
@@ -74,6 +74,20 @@
			clocks = <&tcu TCU_CLK_WDT>;
			clock-names = "wdt";
		};

		pwm: pwm@40 {
			compatible = "ingenic,jz4740-pwm";
			reg = <0x40 0x80>;

			#pwm-cells = <3>;

			clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
				 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
				 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
				 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
			clock-names = "timer0", "timer1", "timer2", "timer3",
				      "timer4", "timer5", "timer6", "timer7";
		};
	};

	rtc_dev: rtc@10003000 {
+34 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0

#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,tcu.h>

/ {
	#address-cells = <1>;
@@ -65,6 +66,39 @@

		interrupt-parent = <&intc>;
		interrupts = <27 26 25>;

		watchdog: watchdog@0 {
			compatible = "ingenic,jz4770-watchdog",
				     "ingenic,jz4740-watchdog";
			reg = <0x0 0xc>;

			clocks = <&tcu TCU_CLK_WDT>;
			clock-names = "wdt";
		};

		pwm: pwm@40 {
			compatible = "ingenic,jz4770-pwm", "ingenic,jz4740-pwm";
			reg = <0x40 0x80>;

			#pwm-cells = <3>;

			clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
				 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
				 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
				 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
			clock-names = "timer0", "timer1", "timer2", "timer3",
				      "timer4", "timer5", "timer6", "timer7";
		};

		ost: timer@e0 {
			compatible = "ingenic,jz4770-ost";
			reg = <0xe0 0x20>;

			clocks = <&tcu TCU_CLK_OST>;
			clock-names = "ost";

			interrupts = <15>;
		};
	};

	pinctrl: pin-controller@10010000 {
+24 −0
Original line number Diff line number Diff line
@@ -76,6 +76,30 @@
			clocks = <&tcu TCU_CLK_WDT>;
			clock-names = "wdt";
		};

		pwm: pwm@40 {
			compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
			reg = <0x40 0x80>;

			#pwm-cells = <3>;

			clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
				 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
				 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
				 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
			clock-names = "timer0", "timer1", "timer2", "timer3",
				      "timer4", "timer5", "timer6", "timer7";
		};

		ost: timer@e0 {
			compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
			reg = <0xe0 0x20>;

			clocks = <&tcu TCU_CLK_OST>;
			clock-names = "ost";

			interrupts = <15>;
		};
	};

	rtc_dev: rtc@10003000 {