Commit bf2320a6 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'net-atlantic-A2-support' 

Igor Russkikh says:

====================
net: atlantic: A2 support

This patchset adds support for the new generation of Atlantic NICs.

Chip generations are mostly compatible register-wise, but there are still
some differences. Therefore we've made some of first generation (A1) code
non-static to re-use it where possible.

Some pieces are A2 specific, in which case we redefine/extend such APIs.

v2:
 * removed #pragma pack (2 structures require the packed attribute);
 * use defines instead of magic numbers where possible;

v1: https://patchwork.ozlabs.org/cover/1276220/


====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents e00edb4e 43c670c8

drivers/net/ethernet/aquantia/atlantic/Makefile

+4 −0
Original line number Diff line number Diff line
@@ -25,6 +25,10 @@ atlantic-objs := aq_main.o \ 
	hw_atl/hw_atl_utils.o \

	hw_atl/hw_atl_utils_fw2x.o \

	hw_atl/hw_atl_llh.o \

	hw_atl2/hw_atl2.o \

	hw_atl2/hw_atl2_utils.o \

	hw_atl2/hw_atl2_utils_fw.o \

	hw_atl2/hw_atl2_llh.o \

	macsec/macsec_api.o



atlantic-$(CONFIG_MACSEC) += aq_macsec.o

drivers/net/ethernet/aquantia/atlantic/aq_cfg.h

+2 −2
Original line number Diff line number Diff line
@@ -80,8 +80,8 @@ 


#define AQ_CFG_LOCK_TRYS   100U



#define AQ_CFG_DRV_AUTHOR      "aQuantia"

#define AQ_CFG_DRV_DESC        "aQuantia Corporation(R) Network Driver"

#define AQ_CFG_DRV_AUTHOR      "Marvell"

#define AQ_CFG_DRV_DESC        "Marvell (Aquantia) Corporation(R) Network Driver"

#define AQ_CFG_DRV_NAME        "atlantic"



#endif /* AQ_CFG_H */

drivers/net/ethernet/aquantia/atlantic/aq_common.h

+21 −12
Original line number Diff line number Diff line
@@ -37,7 +37,14 @@ 
#define AQ_DEVICE_ID_AQC111S	0x91B1

#define AQ_DEVICE_ID_AQC112S	0x92B1



#define HW_ATL_NIC_NAME "aQuantia AQtion 10Gbit Network Adapter"

#define AQ_DEVICE_ID_AQC113DEV	0x00C0

#define AQ_DEVICE_ID_AQC113CS	0x94C0

#define AQ_DEVICE_ID_AQC114CS	0x93C0

#define AQ_DEVICE_ID_AQC113	0x04C0

#define AQ_DEVICE_ID_AQC113C	0x14C0

#define AQ_DEVICE_ID_AQC115C	0x12C0



#define HW_ATL_NIC_NAME "Marvell (aQuantia) AQtion 10Gbit Network Adapter"



#define AQ_HWREV_ANY	0

#define AQ_HWREV_1	1
@@ -49,10 +56,12 @@ 
#define AQ_NIC_RATE_2GS		BIT(3)

#define AQ_NIC_RATE_1G		BIT(4)

#define AQ_NIC_RATE_100M	BIT(5)

#define AQ_NIC_RATE_10M		BIT(6)



#define AQ_NIC_RATE_EEE_10G	BIT(6)

#define AQ_NIC_RATE_EEE_5G	BIT(7)

#define AQ_NIC_RATE_EEE_2GS	BIT(8)

#define AQ_NIC_RATE_EEE_1G	BIT(9)

#define AQ_NIC_RATE_EEE_10G	BIT(7)

#define AQ_NIC_RATE_EEE_5G	BIT(8)

#define AQ_NIC_RATE_EEE_2GS	BIT(9)

#define AQ_NIC_RATE_EEE_1G	BIT(10)

#define AQ_NIC_RATE_EEE_100M	BIT(11)



#endif /* AQ_COMMON_H */

drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c

+3 −0
Original line number Diff line number Diff line
@@ -611,6 +611,9 @@ static enum hw_atl_fw2x_rate eee_mask_to_ethtool_mask(u32 speed) 
	if (speed & AQ_NIC_RATE_EEE_1G)

		rate |= SUPPORTED_1000baseT_Full;



	if (speed & AQ_NIC_RATE_EEE_100M)

		rate |= SUPPORTED_100baseT_Full;



	return rate;

}

drivers/net/ethernet/aquantia/atlantic/aq_hw.h

+21 −1
Original line number Diff line number Diff line
@@ -55,6 +55,7 @@ struct aq_hw_caps_s { 
	u8 rx_rings;

	bool flow_control;

	bool is_64_dma;

	u32 priv_data_len;

};



struct aq_hw_link_status_s {
@@ -136,6 +137,19 @@ enum aq_priv_flags { 
				 BIT(AQ_HW_LOOPBACK_PHYINT_SYS) |\

				 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS))



#define ATL_HW_CHIP_MIPS         0x00000001U

#define ATL_HW_CHIP_TPO2         0x00000002U

#define ATL_HW_CHIP_RPF2         0x00000004U

#define ATL_HW_CHIP_MPI_AQ       0x00000010U

#define ATL_HW_CHIP_ATLANTIC     0x00800000U

#define ATL_HW_CHIP_REVISION_A0  0x01000000U

#define ATL_HW_CHIP_REVISION_B0  0x02000000U

#define ATL_HW_CHIP_REVISION_B1  0x04000000U

#define ATL_HW_CHIP_ANTIGUA      0x08000000U



#define ATL_HW_IS_CHIP_FEATURE(_HW_, _F_) (!!(ATL_HW_CHIP_##_F_ & \

	(_HW_)->chip_features))



struct aq_hw_s {

	atomic_t flags;

	u8 rbl_enabled:1;
@@ -159,6 +173,7 @@ struct aq_hw_s { 
	struct hw_atl_utils_fw_rpc rpc;

	s64 ptp_clk_offset;

	u16 phy_id;

	void *priv;

};



struct aq_ring_s;
@@ -182,6 +197,11 @@ struct aq_hw_ops { 


	int (*hw_set_mac_address)(struct aq_hw_s *self, u8 *mac_addr);



	int (*hw_soft_reset)(struct aq_hw_s *self);



	int (*hw_prepare)(struct aq_hw_s *self,

			  const struct aq_fw_ops **fw_ops);



	int (*hw_reset)(struct aq_hw_s *self);



	int (*hw_init)(struct aq_hw_s *self, u8 *mac_addr);
@@ -254,7 +274,7 @@ struct aq_hw_ops { 


	struct aq_stats_s *(*hw_get_hw_stats)(struct aq_hw_s *self);



	int (*hw_get_fw_version)(struct aq_hw_s *self, u32 *fw_version);

	u32 (*hw_get_fw_version)(struct aq_hw_s *self);



	int (*hw_set_offload)(struct aq_hw_s *self,

			      struct aq_nic_cfg_s *aq_nic_cfg);

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