Commit bf146a1a authored by Lokesh Vutla's avatar Lokesh Vutla Committed by Tero Kristo
Browse files

arm64: dts: ti: k3-j721e: Update the power domain cells 



Update the power-domain cells to 2 and mark all devices as
exclusive. Main uart 0 is the debug console for processor boards
and it is used by different software entities like u-boot, atf,
linux simultaneously. So just mark main_uart0 as shared device
for common processor board.

Reviewed-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
parent c68272cb

arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts

+4 −0
Original line number Diff line number Diff line
@@ -19,6 +19,10 @@ 
	status = "disabled";

};



&main_uart0 {

	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;

};



&main_uart3 {

	/* UART not brought out */

	status = "disabled";

arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

+10 −10
Original line number Diff line number Diff line
@@ -119,7 +119,7 @@ 
		interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 146>;

		power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 146 0>;

		clock-names = "fclk";

	};
@@ -132,7 +132,7 @@ 
		interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 278>;

		power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 278 0>;

		clock-names = "fclk";

	};
@@ -145,7 +145,7 @@ 
		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 279>;

		power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 279 0>;

		clock-names = "fclk";

	};
@@ -158,7 +158,7 @@ 
		interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 280>;

		power-domains = <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 280 0>;

		clock-names = "fclk";

	};
@@ -171,7 +171,7 @@ 
		interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 281>;

		power-domains = <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 281 0>;

		clock-names = "fclk";

	};
@@ -184,7 +184,7 @@ 
		interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 282>;

		power-domains = <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 282 0>;

		clock-names = "fclk";

	};
@@ -197,7 +197,7 @@ 
		interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 283>;

		power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 283 0>;

		clock-names = "fclk";

	};
@@ -210,7 +210,7 @@ 
		interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 284>;

		power-domains = <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 284 0>;

		clock-names = "fclk";

	};
@@ -223,7 +223,7 @@ 
		interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 285>;

		power-domains = <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 285 0>;

		clock-names = "fclk";

	};
@@ -236,7 +236,7 @@ 
		interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 286>;

		power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 286 0>;

		clock-names = "fclk";

	};

arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ 


		k3_pds: power-controller {

			compatible = "ti,sci-pm-domain";

			#power-domain-cells = <1>;

			#power-domain-cells = <2>;

		};



		k3_clks: clocks {
@@ -59,7 +59,7 @@ 
		interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <48000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 287>;

		power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 287 0>;

		clock-names = "fclk";

	};
@@ -72,7 +72,7 @@ 
		interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <96000000>;

		current-speed = <115200>;

		power-domains = <&k3_pds 149>;

		power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 149 0>;

		clock-names = "fclk";

	};

arch/arm64/boot/dts/ti/k3-j721e.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/pinctrl/k3.h>

#include <dt-bindings/soc/ti,sci_pm_domain.h>



/ {

	model = "Texas Instruments K3 J721E SoC";

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