Commit befc8236 authored by Joseph Lo's avatar Joseph Lo Committed by Rob Herring
Browse files

dt-bindings: memory: tegra: Add external memory controller binding for Tegra210



Add the binding document for the external memory controller (EMC) which
communicates with external LPDDR4 devices. It includes the bindings of
the EMC node and a sub-node of EMC table which under the reserved memory
node. The EMC table contains the data of the rates that EMC supported.

Signed-off-by: default avatarJoseph Lo <josephl@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 18bc9915
Loading
Loading
Loading
Loading
+82 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-emc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra210 SoC External Memory Controller

maintainers:
  - Thierry Reding <thierry.reding@gmail.com>
  - Jon Hunter <jonathanh@nvidia.com>

description: |
  The EMC interfaces with the off-chip SDRAM to service the request stream
  sent from the memory controller.

properties:
  compatible:
    const: nvidia,tegra210-emc

  reg:
    maxItems: 3

  clocks:
    items:
      - description: external memory clock

  clock-names:
    items:
      - const: emc

  interrupts:
    items:
      - description: EMC general interrupt

  memory-region:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      phandle to a reserved memory region describing the table of EMC
      frequencies trained by the firmware

  nvidia,memory-controller:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      phandle of the memory controller node

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - nvidia,memory-controller

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/tegra210-car.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    reserved-memory {
        #address-cells = <1>;
        #size-cells = <1>;
        ranges;

        emc_table: emc-table@83400000 {
            compatible = "nvidia,tegra210-emc-table";
            reg = <0x83400000 0x10000>;
        };
    };

    external-memory-controller@7001b000 {
        compatible = "nvidia,tegra210-emc";
        reg = <0x7001b000 0x1000>,
              <0x7001e000 0x1000>,
              <0x7001f000 0x1000>;
        clocks = <&tegra_car TEGRA210_CLK_EMC>;
        clock-names = "emc";
        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
        memory-region = <&emc_table>;
        nvidia,memory-controller = <&mc>;
    };