Unverified Commit bed13787 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Palmer Dabbelt
Browse files

riscv: print the unexpected interrupt cause 



This has been helpful when debugging my pending nommu port.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Reviewed-by: default avatarNick Kossifidis <mick@ics.forth.gr>
Signed-off-by: default avatarPalmer Dabbelt <palmer@sifive.com>
parent 6ab77af4

arch/riscv/kernel/irq.c

+2 −1
Original line number Diff line number Diff line
@@ -54,7 +54,8 @@ asmlinkage void __irq_entry do_IRQ(struct pt_regs *regs) 
		handle_arch_irq(regs);

		break;

	default:

		panic("unexpected interrupt cause");

		pr_alert("unexpected interrupt cause 0x%lx", regs->scause);

		BUG();

	}

	irq_exit();

CRA Git | Maintained and supported by SUSTech CRA and CCSE