Commit be378b60 authored by Leonard Crestez's avatar Leonard Crestez Committed by Shawn Guo
Browse files

clk: imx8mn: Add GIC clock 



This is enabled by default but if it's not explicitly defined and marked
as critical then its parent might get turned off.

Signed-off-by: default avatarLeonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent b3d08a4b

drivers/clk/imx/clk-imx8mn.c

+5 −0
Original line number Diff line number Diff line
@@ -271,6 +271,10 @@ static const char * const imx8mn_usb_phy_sels[] = {"osc_24m", "sys_pll1_100m", " 
						   "sys_pll2_100m", "sys_pll2_200m", "clk_ext2",

						   "clk_ext3", "audio_pll2_out", };



static const char * const imx8mn_gic_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",

					"sys_pll2_100m", "sys_pll1_800m", "clk_ext2",

					"clk_ext4", "audio_pll2_out" };



static const char * const imx8mn_ecspi1_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",

						  "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",

						  "sys_pll2_250m", "audio_pll2_out", };
@@ -524,6 +528,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) 
	clks[IMX8MN_CLK_UART4] = imx8m_clk_composite("uart4", imx8mn_uart4_sels, base + 0xb080);

	clks[IMX8MN_CLK_USB_CORE_REF] = imx8m_clk_composite("usb_core_ref", imx8mn_usb_core_sels, base + 0xb100);

	clks[IMX8MN_CLK_USB_PHY_REF] = imx8m_clk_composite("usb_phy_ref", imx8mn_usb_phy_sels, base + 0xb180);

	clks[IMX8MN_CLK_GIC] = imx8m_clk_composite_critical("gic", imx8mn_gic_sels, base + 0xb200);

	clks[IMX8MN_CLK_ECSPI1] = imx8m_clk_composite("ecspi1", imx8mn_ecspi1_sels, base + 0xb280);

	clks[IMX8MN_CLK_ECSPI2] = imx8m_clk_composite("ecspi2", imx8mn_ecspi2_sels, base + 0xb300);

	clks[IMX8MN_CLK_PWM1] = imx8m_clk_composite("pwm1", imx8mn_pwm1_sels, base + 0xb380);

include/dt-bindings/clock/imx8mn-clock.h

+2 −1
Original line number Diff line number Diff line
@@ -209,7 +209,8 @@ 
#define IMX8MN_CLK_ARM				191

#define IMX8MN_CLK_NAND_USDHC_BUS_RAWNAND_CLK	192

#define IMX8MN_CLK_GPU_CORE_ROOT		193

#define IMX8MN_CLK_GIC				194



#define IMX8MN_CLK_END				194

#define IMX8MN_CLK_END				195



#endif

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