Commit be1b5b78 authored by David S. Miller's avatar David S. Miller
Browse files


Jeff Kirsher says:

====================
1GbE Intel Wired LAN Driver Updates 2019-05-28

This series contains updates to e1000e, igb and igc.

Feng adds additional information on a warning message when a read of a
hardware register fails.

Gustavo A. R. Silva fixes up two "fall through" code comments so that
the checkers can actually determine that we did comment that the case
statement is falling through to the next case.

Sasha does some cleanup on the igc driver by removing duplicate
white space and removed a unneeded workaround for igc.  Adds support for
flow control to the igc driver.

Konstantin Khlebnikov reverts a previous fix which was causing a false
positive for a hardware hang.  Provides a fix so that when link is lost
the packets in the transmit queue are flushed and wakes the transmit
queue when the NIC is ready to send packets.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents c38e57ae 62a5b842
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+13 −8
Original line number Diff line number Diff line
@@ -4208,7 +4208,7 @@ void e1000e_up(struct e1000_adapter *adapter)
		e1000_configure_msix(adapter);
	e1000_irq_enable(adapter);

	netif_start_queue(adapter->netdev);
	/* Tx queue started by watchdog timer when link is up */

	e1000e_trigger_lsc(adapter);
}
@@ -4606,6 +4606,7 @@ int e1000e_open(struct net_device *netdev)
	pm_runtime_get_sync(&pdev->dev);

	netif_carrier_off(netdev);
	netif_stop_queue(netdev);

	/* allocate transmit descriptors */
	err = e1000e_setup_tx_resources(adapter->tx_ring);
@@ -4666,7 +4667,6 @@ int e1000e_open(struct net_device *netdev)
	e1000_irq_enable(adapter);

	adapter->tx_hang_recheck = false;
	netif_start_queue(netdev);

	hw->mac.get_link_status = true;
	pm_runtime_put(&pdev->dev);
@@ -5288,6 +5288,7 @@ static void e1000_watchdog_task(struct work_struct *work)
			if (phy->ops.cfg_on_link_up)
				phy->ops.cfg_on_link_up(hw);

			netif_wake_queue(netdev);
			netif_carrier_on(netdev);

			if (!test_bit(__E1000_DOWN, &adapter->state))
@@ -5301,6 +5302,7 @@ static void e1000_watchdog_task(struct work_struct *work)
			/* Link status message must follow this format */
			pr_info("%s NIC Link is Down\n", adapter->netdev->name);
			netif_carrier_off(netdev);
			netif_stop_queue(netdev);
			if (!test_bit(__E1000_DOWN, &adapter->state))
				mod_timer(&adapter->phy_info_timer,
					  round_jiffies(jiffies + 2 * HZ));
@@ -5308,13 +5310,8 @@ static void e1000_watchdog_task(struct work_struct *work)
			/* 8000ES2LAN requires a Rx packet buffer work-around
			 * on link down event; reset the controller to flush
			 * the Rx packet buffer.
			 *
			 * If the link is lost the controller stops DMA, but
			 * if there is queued Tx work it cannot be done.  So
			 * reset the controller to flush the Tx packet buffers.
			 */
			if ((adapter->flags & FLAG_RX_NEEDS_RESTART) ||
			    e1000_desc_unused(tx_ring) + 1 < tx_ring->count)
			if (adapter->flags & FLAG_RX_NEEDS_RESTART)
				adapter->flags |= FLAG_RESTART_NOW;
			else
				pm_schedule_suspend(netdev->dev.parent,
@@ -5337,6 +5334,14 @@ link_up:
	adapter->gotc_old = adapter->stats.gotc;
	spin_unlock(&adapter->stats64_lock);

	/* If the link is lost the controller stops DMA, but
	 * if there is queued Tx work it cannot be done.  So
	 * reset the controller to flush the Tx packet buffers.
	 */
	if (!netif_carrier_ok(netdev) &&
	    (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
		adapter->flags |= FLAG_RESTART_NOW;

	/* If reset is necessary, do it outside of interrupt context. */
	if (adapter->flags & FLAG_RESTART_NOW) {
		schedule_work(&adapter->reset_task);
+1 −1
Original line number Diff line number Diff line
@@ -638,7 +638,7 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
			dev_spec->sgmii_active = true;
			break;
		}
		/* fall through for I2C based SGMII */
		/* fall through - for I2C based SGMII */
	case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES:
		/* read media type from SFP EEPROM */
		ret_val = igb_set_sfp_media_type_82575(hw);
+2 −1
Original line number Diff line number Diff line
@@ -753,6 +753,7 @@ u32 igb_rd32(struct e1000_hw *hw, u32 reg)
		struct net_device *netdev = igb->netdev;
		hw->hw_addr = NULL;
		netdev_err(netdev, "PCIe link lost\n");
		WARN(1, "igb: Failed to read reg 0x%x!\n", reg);
	}

	return value;
@@ -6695,7 +6696,7 @@ static int __igb_notify_dca(struct device *dev, void *data)
			igb_setup_dca(adapter);
			break;
		}
		/* Fall Through since DCA is disabled. */
		/* Fall Through - since DCA is disabled. */
	case DCA_PROVIDER_REMOVE:
		if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
			/* without this a class_device is left
+0 −49
Original line number Diff line number Diff line
@@ -9,50 +9,6 @@
#include "igc_base.h"
#include "igc.h"

/**
 * igc_set_pcie_completion_timeout - set pci-e completion timeout
 * @hw: pointer to the HW structure
 */
static s32 igc_set_pcie_completion_timeout(struct igc_hw *hw)
{
	u32 gcr = rd32(IGC_GCR);
	u16 pcie_devctl2;
	s32 ret_val = 0;

	/* only take action if timeout value is defaulted to 0 */
	if (gcr & IGC_GCR_CMPL_TMOUT_MASK)
		goto out;

	/* if capabilities version is type 1 we can write the
	 * timeout of 10ms to 200ms through the GCR register
	 */
	if (!(gcr & IGC_GCR_CAP_VER2)) {
		gcr |= IGC_GCR_CMPL_TMOUT_10ms;
		goto out;
	}

	/* for version 2 capabilities we need to write the config space
	 * directly in order to set the completion timeout value for
	 * 16ms to 55ms
	 */
	ret_val = igc_read_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,
					&pcie_devctl2);
	if (ret_val)
		goto out;

	pcie_devctl2 |= PCIE_DEVICE_CONTROL2_16ms;

	ret_val = igc_write_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,
					 &pcie_devctl2);
out:
	/* disable completion timeout resend */
	gcr &= ~IGC_GCR_CMPL_TMOUT_RESEND;

	wr32(IGC_GCR, gcr);

	return ret_val;
}

/**
 * igc_reset_hw_base - Reset hardware
 * @hw: pointer to the HW structure
@@ -72,11 +28,6 @@ static s32 igc_reset_hw_base(struct igc_hw *hw)
	if (ret_val)
		hw_dbg("PCI-E Master disable polling has failed.\n");

	/* set the completion timeout for interface */
	ret_val = igc_set_pcie_completion_timeout(hw);
	if (ret_val)
		hw_dbg("PCI-E Set completion timeout has failed.\n");

	hw_dbg("Masking off all interrupts\n");
	wr32(IGC_IMC, 0xffffffff);

+6 −12
Original line number Diff line number Diff line
@@ -29,12 +29,6 @@
/* Status of Master requests. */
#define IGC_STATUS_GIO_MASTER_ENABLE	0x00080000

/* PCI Express Control */
#define IGC_GCR_CMPL_TMOUT_MASK		0x0000F000
#define IGC_GCR_CMPL_TMOUT_10ms		0x00001000
#define IGC_GCR_CMPL_TMOUT_RESEND	0x00010000
#define IGC_GCR_CAP_VER2		0x00040000

/* Receive Address
 * Number of high/low register pairs in the RAR. The RAR (Receive Address
 * Registers) holds the directed and multicast addresses that we monitor.
@@ -72,6 +66,9 @@

#define IGC_CONNSW_AUTOSENSE_EN	0x1

/* As per the EAS the maximum supported size is 9.5KB (9728 bytes) */
#define MAX_JUMBO_FRAME_SIZE	0x2600

/* PBA constants */
#define IGC_PBA_34K		0x0022

@@ -264,9 +261,6 @@
#define IGC_TCTL_RTLC		0x01000000 /* Re-transmit on late collision */
#define IGC_TCTL_MULR		0x10000000 /* Multiple request support */

#define IGC_CT_SHIFT			4
#define IGC_COLLISION_THRESHOLD		15

/* Flow Control Constants */
#define FLOW_CONTROL_ADDRESS_LOW	0x00C28001
#define FLOW_CONTROL_ADDRESS_HIGH	0x00000100
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