Commit be0ec060 authored May 20, 2020 by Hamish Martin Committed by Florian Fainelli May 20, 2020

ARM: dts: bcm: HR2: Fix PPI interrupt types



These error messages are output when booting on a BCM HR2 system:
    GIC: PPI11 is secure or misconfigured
    GIC: PPI13 is secure or misconfigured

Per ARM documentation these interrupts are triggered on a rising edge.
See ARM Cortex A-9 MPCore Technical Reference Manual, Revision r4p1,
Section 3.3.8 Interrupt Configuration Registers.

The same issue was resolved for NSP systems in commit 5f1aa51c
("ARM: dts: NSP: Fix PPI interrupt types").

Fixes: b9099ec7 ("ARM: dts: Add Broadcom Hurricane 2 DTS include file")
Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

parent 58bb90ab

arch/arm/boot/dts/bcm-hr2.dtsi

+3 −3

Original line number	Diff line number	Diff line
		@@ -75,7 +75,7 @@
		timer@20200 {
		compatible = "arm,cortex-a9-global-timer";
		reg = <0x20200 0x100>;
		interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
		interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
		clocks = <&periph_clk>;
		};

		@@ -83,7 +83,7 @@
		compatible = "arm,cortex-a9-twd-timer";
		reg = <0x20600 0x20>;
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) \|
		IRQ_TYPE_LEVEL_HIGH)>;
		IRQ_TYPE_EDGE_RISING)>;
		clocks = <&periph_clk>;
		};

		@@ -91,7 +91,7 @@
		compatible = "arm,cortex-a9-twd-wdt";
		reg = <0x20620 0x20>;
		interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) \|
		IRQ_TYPE_LEVEL_HIGH)>;
		IRQ_TYPE_EDGE_RISING)>;
		clocks = <&periph_clk>;
		};

Admin message