dt-bindings: clock: ti: add latching support to mux and divider clocks (be02637f) · Commits · 戴 / test

Certain hardware configurations, like dra76x, have some of the clock registers partitioned in a funky manner that requires the clock control setup to be latched for PRCM to be notified of the change. This is accomplished with a separate control bit under the register. Add support for this clock latching support to divider and mux clocks. Signed-off-by:

Tero Kristo <t-kristo@ti.com> Reviewed-by:

Rob Herring <robh@kernel.org>

Documentation/devicetree/bindings/clock/ti/divider.txt

+3 −0

Original line number	Diff line number	Diff line
		@@ -75,6 +75,9 @@ Optional properties:
		- ti,invert-autoidle-bit : autoidle is enabled by setting the bit to 0,
		see [2]
		- ti,set-rate-parent : clk_set_rate is propagated to parent
		- ti,latch-bit : latch the divider value to HW, only needed if the register
		access requires this. As an example dra76x DPLL_GMAC H14 divider implements
		such behavior.

		Examples:
		dpll_usb_m2_ck: dpll_usb_m2_ck@4a008190 {

Documentation/devicetree/bindings/clock/ti/mux.txt

+3 −0

Original line number	Diff line number	Diff line
		@@ -48,6 +48,9 @@ Optional properties:
		zero
		- ti,set-rate-parent : clk_set_rate is propagated to parent clock,
		not supported by the composite-mux-clock subtype
		- ti,latch-bit : latch the mux value to HW, only needed if the register
		access requires this. As an example, dra7x DPLL_GMAC H14 muxing
		implements such behavior.

		Examples:

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