Commit bdda8b05 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla
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ARM: STi: STiH416: Add interrupt support for pin controller 



This patch adds interrupt support for STiH416 pin controllers.

Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@st.com>
parent 38dbfb59

arch/arm/boot/dts/stih416-pinctrl.dtsi

+81 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
 * publishhed by the Free Software Foundation.

 */

#include "st-pincfg.h"

#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {



	aliases {
@@ -49,41 +50,57 @@ 
			#size-cells	= <1>;

			compatible	= "st,stih416-sbc-pinctrl";

			st,syscfg	= <&syscfg_sbc>;

			reg 		= <0xfe61f080 0x4>;

			reg-names	= "irqmux";

			interrupts 	= <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;

			interrupts-names = "irqmux";

			ranges		= <0 0xfe610000 0x6000>;



			PIO0: gpio@fe610000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0 0x100>;

				st,bank-name	= "PIO0";

			};

			PIO1: gpio@fe611000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x1000 0x100>;

				st,bank-name	= "PIO1";

			};

			PIO2: gpio@fe612000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x2000 0x100>;

				st,bank-name	= "PIO2";

			};

			PIO3: gpio@fe613000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x3000 0x100>;

				st,bank-name	= "PIO3";

			};

			PIO4: gpio@fe614000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x4000 0x100>;

				st,bank-name	= "PIO4";

			};

			PIO40: gpio@fe615000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x5000 0x100>;

				st,bank-name	= "PIO40";

				st,retime-pin-mask = <0x7f>;
@@ -122,65 +139,89 @@ 
			#size-cells	= <1>;

			compatible	= "st,stih416-front-pinctrl";

			st,syscfg	= <&syscfg_front>;

			reg 		= <0xfee0f080 0x4>;

			reg-names	= "irqmux";

			interrupts 	= <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;

			interrupts-names = "irqmux";

			ranges		= <0 0xfee00000 0x10000>;



			PIO5: gpio@fee00000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0 0x100>;

				st,bank-name	= "PIO5";

			};

			PIO6: gpio@fee01000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x1000 0x100>;

				st,bank-name	= "PIO6";

			};

			PIO7: gpio@fee02000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x2000 0x100>;

				st,bank-name	= "PIO7";

			};

			PIO8: gpio@fee03000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x3000 0x100>;

				st,bank-name	= "PIO8";

			};

			PIO9: gpio@fee04000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x4000 0x100>;

				st,bank-name	= "PIO9";

			};

			PIO10: gpio@fee05000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x5000 0x100>;

				st,bank-name	= "PIO10";

			};

			PIO11: gpio@fee06000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x6000 0x100>;

				st,bank-name	= "PIO11";

			};

			PIO12: gpio@fee07000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x7000 0x100>;

				st,bank-name	= "PIO12";

			};

			PIO30: gpio@fee08000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x8000 0x100>;

				st,bank-name	= "PIO30";

			};

			PIO31: gpio@fee09000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x9000 0x100>;

				st,bank-name	= "PIO31";

			};
@@ -217,41 +258,57 @@ 
			#size-cells	= <1>;

			compatible	= "st,stih416-rear-pinctrl";

			st,syscfg	= <&syscfg_rear>;

			reg 		= <0xfe82f080 0x4>;

			reg-names	= "irqmux";

			interrupts 	= <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;

			interrupts-names = "irqmux";

			ranges 		= <0 0xfe820000 0x6000>;



			PIO13: gpio@fe820000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0 0x100>;

				st,bank-name	= "PIO13";

			};

			PIO14: gpio@fe821000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x1000 0x100>;

				st,bank-name	= "PIO14";

			};

			PIO15: gpio@fe822000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x2000 0x100>;

				st,bank-name	= "PIO15";

			};

			PIO16: gpio@fe823000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x3000 0x100>;

				st,bank-name	= "PIO16";

			};

			PIO17: gpio@fe824000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x4000 0x100>;

				st,bank-name	= "PIO17";

			};

			PIO18: gpio@fe825000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x5000 0x100>;

				st,bank-name	= "PIO18";

				st,retime-pin-mask = <0xf>;
@@ -272,23 +329,33 @@ 
			#size-cells	= <1>;

			compatible	= "st,stih416-fvdp-fe-pinctrl";

			st,syscfg	= <&syscfg_fvdp_fe>;

			reg 		= <0xfd6bf080 0x4>;

			reg-names	= "irqmux";

			interrupts 	= <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;

			interrupts-names = "irqmux";

			ranges		= <0 0xfd6b0000 0x3000>;



			PIO100: gpio@fd6b0000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0 0x100>;

				st,bank-name	= "PIO100";

			};

			PIO101: gpio@fd6b1000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x1000 0x100>;

				st,bank-name	= "PIO101";

			};

			PIO102: gpio@fd6b2000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x2000 0x100>;

				st,bank-name	= "PIO102";

			};
@@ -299,29 +366,41 @@ 
			#size-cells	= <1>;

			compatible	= "st,stih416-fvdp-lite-pinctrl";

			st,syscfg		= <&syscfg_fvdp_lite>;

			reg 		= <0xfd33f080 0x4>;

			reg-names	= "irqmux";

			interrupts 	= <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;

			interrupts-names = "irqmux";

			ranges			= <0 0xfd330000 0x5000>;



			PIO103: gpio@fd330000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0 0x100>;

				st,bank-name	= "PIO103";

			};

			PIO104: gpio@fd331000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x1000 0x100>;

				st,bank-name	= "PIO104";

			};

			PIO105: gpio@fd332000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x2000 0x100>;

				st,bank-name	= "PIO105";

			};

			PIO106: gpio@fd333000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x3000 0x100>;

				st,bank-name	= "PIO106";

			};
@@ -329,6 +408,8 @@ 
			PIO107: gpio@fd334000 {

				gpio-controller;

				#gpio-cells	= <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg		= <0x4000 0x100>;

				st,bank-name	= "PIO107";

				st,retime-pin-mask = <0xf>;

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