Commit bdbdb571 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/si/dpm: fix phase shedding setup



Used the wrong index to setup the phase shedding mask.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 42792029
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+1 −1
Original line number Diff line number Diff line
@@ -4593,7 +4593,7 @@ static int si_populate_smc_voltage_tables(struct amdgpu_device *adev,
							      &adev->pm.dpm.dyn_state.phase_shedding_limits_table)) {
				si_populate_smc_voltage_table(adev, &si_pi->vddc_phase_shed_table, table);

				table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] =
				table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] =
					cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low);

				si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_phase_shedding_delay,
+1 −0
Original line number Diff line number Diff line
@@ -194,6 +194,7 @@ typedef struct SISLANDS_SMC_SWSTATE SISLANDS_SMC_SWSTATE;
#define SISLANDS_SMC_VOLTAGEMASK_VDDC  0
#define SISLANDS_SMC_VOLTAGEMASK_MVDD  1
#define SISLANDS_SMC_VOLTAGEMASK_VDDCI 2
#define SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING 3
#define SISLANDS_SMC_VOLTAGEMASK_MAX   4

struct SISLANDS_SMC_VOLTAGEMASKTABLE