Commit bda2a44e authored by Joe Perches's avatar Joe Perches Committed by Greg Kroah-Hartman
Browse files

staging: vt6655: Fix macro definitions 



Macros should be able to be used in if/else
without braces.

Convert macros to use do {} while (0) instead
of bare braces where appropriate.

Convert macros to use single line macro definitions
where appropriate.

Signed-off-by: default avatarJoe Perches <joe@perches.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent a7307538

drivers/staging/vt6655/baseband.h

+2 −6
Original line number Diff line number Diff line
@@ -72,14 +72,10 @@ 
/*---------------------  Export Macros ------------------------------*/



#define BBvClearFOE(dwIoBase)				\

	{						\

		BBbWriteEmbedded(dwIoBase, 0xB1, 0);	\

	}

	BBbWriteEmbedded(dwIoBase, 0xB1, 0)



#define BBvSetFOE(dwIoBase)				\

	{						\

		BBbWriteEmbedded(dwIoBase, 0xB1, 0x0C);	\

	}

	BBbWriteEmbedded(dwIoBase, 0xB1, 0x0C)





/*---------------------  Export Classes  ----------------------------*/

drivers/staging/vt6655/device_cfg.h

+8 −7
Original line number Diff line number Diff line
@@ -83,13 +83,14 @@ typedef enum _chip_type { 




#ifdef VIAWET_DEBUG

#define ASSERT(x) {							\

#define ASSERT(x)							\

do {									\

	if (!(x)) {							\

			printk(KERN_ERR "assertion %s failed: file %s line %d\n", #x, \

			       __FUNCTION__, __LINE__);			\

		printk(KERN_ERR "assertion %s failed: file %s line %d\n", \

		       #x, __func__, __LINE__);				\

		*(int *)0 = 0;						\

	}								\

	}

} while (0)

#define DBG_PORT80(value)                   outb(value, 0x80)

#else

#define ASSERT(x)

drivers/staging/vt6655/mac.h

+229 −300
Original line number Diff line number Diff line
@@ -638,107 +638,91 @@ 
/*---------------------  Export Macros ------------------------------*/



#define MACvRegBitsOn(dwIoBase, byRegOfs, byBits)			\

	{								\

do {									\

	unsigned char byData;						\

	VNSvInPortB(dwIoBase + byRegOfs, &byData);			\

	VNSvOutPortB(dwIoBase + byRegOfs, byData | (byBits));		\

	}

} while (0)



#define MACvWordRegBitsOn(dwIoBase, byRegOfs, wBits)			\

	{								\

do {									\

	unsigned short wData;						\

	VNSvInPortW(dwIoBase + byRegOfs, &wData);			\

	VNSvOutPortW(dwIoBase + byRegOfs, wData | (wBits));		\

	}

} while (0)



#define MACvDWordRegBitsOn(dwIoBase, byRegOfs, dwBits)			\

	{								\

do {									\

	unsigned long dwData;						\

	VNSvInPortD(dwIoBase + byRegOfs, &dwData);			\

	VNSvOutPortD(dwIoBase + byRegOfs, dwData | (dwBits));		\

	}

} while (0)



#define MACvRegBitsOnEx(dwIoBase, byRegOfs, byMask, byBits)		\

	{								\

do {									\

	unsigned char byData;						\

	VNSvInPortB(dwIoBase + byRegOfs, &byData);			\

	byData &= byMask;						\

	VNSvOutPortB(dwIoBase + byRegOfs, byData | (byBits));		\

	}

} while (0)



#define MACvRegBitsOff(dwIoBase, byRegOfs, byBits)			\

	{								\

do {									\

	unsigned char byData;						\

	VNSvInPortB(dwIoBase + byRegOfs, &byData);			\

	VNSvOutPortB(dwIoBase + byRegOfs, byData & ~(byBits));		\

	}

} while (0)



#define MACvWordRegBitsOff(dwIoBase, byRegOfs, wBits)			\

	{								\

do {									\

	unsigned short wData;						\

	VNSvInPortW(dwIoBase + byRegOfs, &wData);			\

	VNSvOutPortW(dwIoBase + byRegOfs, wData & ~(wBits));		\

	}

} while (0)



#define MACvDWordRegBitsOff(dwIoBase, byRegOfs, dwBits)			\

	{								\

do {									\

	unsigned long dwData;						\

	VNSvInPortD(dwIoBase + byRegOfs, &dwData);			\

	VNSvOutPortD(dwIoBase + byRegOfs, dwData & ~(dwBits));		\

	}

} while (0)



#define MACvGetCurrRx0DescAddr(dwIoBase, pdwCurrDescAddr)	\

	{							\

	VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0,		\

			    (unsigned long *)pdwCurrDescAddr);	\

	}

		    (unsigned long *)pdwCurrDescAddr)



#define MACvGetCurrRx1DescAddr(dwIoBase, pdwCurrDescAddr)	\

	{							\

	VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1,		\

			    (unsigned long *)pdwCurrDescAddr);	\

	}

		    (unsigned long *)pdwCurrDescAddr)



#define MACvGetCurrTx0DescAddr(dwIoBase, pdwCurrDescAddr)	\

	{							\

	VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0,		\

			    (unsigned long *)pdwCurrDescAddr);	\

	}

		    (unsigned long *)pdwCurrDescAddr)



#define MACvGetCurrAC0DescAddr(dwIoBase, pdwCurrDescAddr)	\

	{							\

	VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR,		\

			    (unsigned long *)pdwCurrDescAddr);	\

	}

		    (unsigned long *)pdwCurrDescAddr)



#define MACvGetCurrSyncDescAddr(dwIoBase, pdwCurrDescAddr)	\

	{							\

	VNSvInPortD(dwIoBase + MAC_REG_SYNCDMAPTR,		\

			    (unsigned long *)pdwCurrDescAddr);	\

	}

		    (unsigned long *)pdwCurrDescAddr)



#define MACvGetCurrATIMDescAddr(dwIoBase, pdwCurrDescAddr)	\

	{							\

	VNSvInPortD(dwIoBase + MAC_REG_ATIMDMAPTR,		\

			    (unsigned long *)pdwCurrDescAddr);	\

	}							\

		    (unsigned long *)pdwCurrDescAddr)



// set the chip with current BCN tx descriptor address

#define MACvSetCurrBCNTxDescAddr(dwIoBase, dwCurrDescAddr)	\

	{							\

	VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR,		\

			     dwCurrDescAddr);			\

	}

		     dwCurrDescAddr)



// set the chip with current BCN length

#define MACvSetCurrBCNLength(dwIoBase, wCurrBCNLength)		\

	{							\

	VNSvOutPortW(dwIoBase + MAC_REG_BCNDMACTL+2,		\

			     wCurrBCNLength);			\

	}

		     wCurrBCNLength)



#define MACvReadBSSIDAddress(dwIoBase, pbyEtherAddr)		\

	{							\

do {								\

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1);		\

	VNSvInPortB(dwIoBase + MAC_REG_BSSID0,			\

		    (unsigned char *)pbyEtherAddr);		\
@@ -753,10 +737,10 @@ 
	VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 5,		\

		    pbyEtherAddr + 5);				\

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0);		\

	}

} while (0)



#define MACvWriteBSSIDAddress(dwIoBase, pbyEtherAddr)		\

	{							\

do {								\

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1);		\

	VNSvOutPortB(dwIoBase + MAC_REG_BSSID0,			\

		     *(pbyEtherAddr));				\
@@ -771,10 +755,10 @@ 
	VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 5,		\

		     *(pbyEtherAddr + 5));			\

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0);		\

	}

} while (0)



#define MACvReadEtherAddress(dwIoBase, pbyEtherAddr)		\

	{							\

do {								\

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1);		\

	VNSvInPortB(dwIoBase + MAC_REG_PAR0,			\

		    (unsigned char *)pbyEtherAddr);		\
@@ -789,11 +773,10 @@ 
	VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 5,		\

		    pbyEtherAddr + 5);				\

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0);		\

	}



} while (0)



#define MACvWriteEtherAddress(dwIoBase, pbyEtherAddr)		\

	{							\

do {								\

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1);		\

	VNSvOutPortB(dwIoBase + MAC_REG_PAR0,			\

		     *pbyEtherAddr);				\
@@ -808,241 +791,187 @@ 
	VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 5,		\

		     *(pbyEtherAddr + 5));			\

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0);		\

	}



} while (0)



#define MACvClearISR(dwIoBase)						\

	{								\

		VNSvOutPortD(dwIoBase + MAC_REG_ISR, IMR_MASK_VALUE);   \

	}

	VNSvOutPortD(dwIoBase + MAC_REG_ISR, IMR_MASK_VALUE)



#define MACvStart(dwIoBase)						\

	{								\

	VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR,				\

			     (HOSTCR_MACEN | HOSTCR_RXON | HOSTCR_TXON)); \

	}

		     (HOSTCR_MACEN | HOSTCR_RXON | HOSTCR_TXON))



#define MACvRx0PerPktMode(dwIoBase)					\

	{								\

		VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, RX_PERPKT);  \

	}

	VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, RX_PERPKT)



#define MACvRx0BufferFillMode(dwIoBase)					\

	{                                                               \

		VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, RX_PERPKTCLR); \

	}

	VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, RX_PERPKTCLR)



#define MACvRx1PerPktMode(dwIoBase)					\

	{								\

		VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, RX_PERPKT);  \

	}

	VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, RX_PERPKT)



#define MACvRx1BufferFillMode(dwIoBase)					\

	{                                                               \

		VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, RX_PERPKTCLR); \

	}

	VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, RX_PERPKTCLR)



#define MACvRxOn(dwIoBase)						\

	{                                                               \

		MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);	\

	}

	MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON)



#define MACvReceive0(dwIoBase)						\

	{                                                               \

do {									\

	unsigned long dwData;						\

	VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);		\

		if (dwData & DMACTL_RUN) {				\

	if (dwData & DMACTL_RUN)					\

		VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_WAKE); \

		}							\

		else {							\

	else								\

		VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN); \

		}							\

	}

} while (0)



#define MACvReceive1(dwIoBase)						\

	{                                                               \

do {									\

	unsigned long dwData;						\

	VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);		\

		if (dwData & DMACTL_RUN) {				\

	if (dwData & DMACTL_RUN)					\

		VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_WAKE); \

		}							\

		else {							\

	else								\

		VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN); \

		}							\

	}

} while (0)



#define MACvTxOn(dwIoBase)						\

	{                                                               \

		MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);	\

	}

	MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON)



#define MACvTransmit0(dwIoBase)						\

	{                                                               \

do {									\

	unsigned long dwData;						\

	VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);		\

		if (dwData & DMACTL_RUN) {				\

	if (dwData & DMACTL_RUN)					\

		VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_WAKE); \

		}							\

		else {							\

	else								\

		VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN); \

		}							\

	}

} while (0)



#define MACvTransmitAC0(dwIoBase)					\

	{                                                               \

do {									\

	unsigned long dwData;						\

	VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);		\

		if (dwData & DMACTL_RUN) {				\

	if (dwData & DMACTL_RUN)					\

		VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_WAKE); \

		}							\

		else {							\

	else								\

		VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN); \

		}							\

	}

} while (0)



#define MACvTransmitSYNC(dwIoBase)					\

	{								\

do {									\

	unsigned long dwData;						\

	VNSvInPortD(dwIoBase + MAC_REG_SYNCDMACTL, &dwData);		\

		if (dwData & DMACTL_RUN) {				\

	if (dwData & DMACTL_RUN)					\

		VNSvOutPortD(dwIoBase + MAC_REG_SYNCDMACTL, DMACTL_WAKE); \

		}							\

		else {							\

	else								\

		VNSvOutPortD(dwIoBase + MAC_REG_SYNCDMACTL, DMACTL_RUN); \

		}							\

	}

} while (0)



#define MACvTransmitATIM(dwIoBase)					\

	{								\

do {									\

	unsigned long dwData;						\

	VNSvInPortD(dwIoBase + MAC_REG_ATIMDMACTL, &dwData);		\

		if (dwData & DMACTL_RUN) {				\

	if (dwData & DMACTL_RUN)					\

		VNSvOutPortD(dwIoBase + MAC_REG_ATIMDMACTL, DMACTL_WAKE); \

		}							\

		else {							\

	else								\

		VNSvOutPortD(dwIoBase + MAC_REG_ATIMDMACTL, DMACTL_RUN); \

		}							\

	}

} while (0)



#define MACvTransmitBCN(dwIoBase)					\

	{                                                               \

		VNSvOutPortB(dwIoBase + MAC_REG_BCNDMACTL, BEACON_READY); \

	}

	VNSvOutPortB(dwIoBase + MAC_REG_BCNDMACTL, BEACON_READY)



#define MACvClearStckDS(dwIoBase)					\

	{								\

do {									\

	unsigned char byOrgValue;					\

	VNSvInPortB(dwIoBase + MAC_REG_STICKHW, &byOrgValue);		\

	byOrgValue = byOrgValue & 0xFC;					\

	VNSvOutPortB(dwIoBase + MAC_REG_STICKHW, byOrgValue);		\

	}

} while (0)



#define MACvReadISR(dwIoBase, pdwValue)				\

	{							\

		VNSvInPortD(dwIoBase + MAC_REG_ISR, pdwValue);  \

	}

	VNSvInPortD(dwIoBase + MAC_REG_ISR, pdwValue)



#define MACvWriteISR(dwIoBase, dwValue)				\

	{							\

		VNSvOutPortD(dwIoBase + MAC_REG_ISR, dwValue);  \

	}

	VNSvOutPortD(dwIoBase + MAC_REG_ISR, dwValue)



#define MACvIntEnable(dwIoBase, dwMask)				\

	{							\

		VNSvOutPortD(dwIoBase + MAC_REG_IMR, dwMask);   \

	}

	VNSvOutPortD(dwIoBase + MAC_REG_IMR, dwMask)



#define MACvIntDisable(dwIoBase)				\

	{							\

		VNSvOutPortD(dwIoBase + MAC_REG_IMR, 0);        \

	}

	VNSvOutPortD(dwIoBase + MAC_REG_IMR, 0)



#define MACvSelectPage0(dwIoBase)				\

	{							\

		VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0);   \

	}

		VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0)



#define MACvSelectPage1(dwIoBase)				\

	{							\

		VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1);   \

	}

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1)



#define MACvReadMIBCounter(dwIoBase, pdwCounter)			\

	{								\

		VNSvInPortD(dwIoBase + MAC_REG_MIBCNTR , pdwCounter);   \

	}

	VNSvInPortD(dwIoBase + MAC_REG_MIBCNTR , pdwCounter)



#define MACvPwrEvntDisable(dwIoBase)					\

	{								\

		VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPEN0, 0x0000);	\

	}

	VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPEN0, 0x0000)



#define MACvEnableProtectMD(dwIoBase)					\

	{								\

do {									\

	unsigned long dwOrgValue;					\

	VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);		\

	dwOrgValue = dwOrgValue | EnCFG_ProtectMd;			\

	VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);		\

	}

} while (0)



#define MACvDisableProtectMD(dwIoBase)					\

	{								\

do {									\

	unsigned long dwOrgValue;					\

	VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);		\

	dwOrgValue = dwOrgValue & ~EnCFG_ProtectMd;			\

	VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);		\

	}

} while (0)



#define MACvEnableBarkerPreambleMd(dwIoBase)				\

	{								\

do {									\

	unsigned long dwOrgValue;					\

	VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);		\

	dwOrgValue = dwOrgValue | EnCFG_BarkerPream;			\

	VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);		\

	}

} while (0)



#define MACvDisableBarkerPreambleMd(dwIoBase)				\

	{								\

do {									\

	unsigned long dwOrgValue;					\

	VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);		\

	dwOrgValue = dwOrgValue & ~EnCFG_BarkerPream;			\

	VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);		\

	}

} while (0)



#define MACvSetBBType(dwIoBase, byTyp)					\

	{								\

do {									\

	unsigned long dwOrgValue;					\

	VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);		\

	dwOrgValue = dwOrgValue & ~EnCFG_BBType_MASK;			\

	dwOrgValue = dwOrgValue | (unsigned long)byTyp;			\

	VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);		\

	}

} while (0)



#define MACvReadATIMW(dwIoBase, pwCounter)				\

	{								\

		VNSvInPortW(dwIoBase + MAC_REG_AIDATIM , pwCounter);	\

	}

	VNSvInPortW(dwIoBase + MAC_REG_AIDATIM, pwCounter)



#define MACvWriteATIMW(dwIoBase, wCounter)				\

	{								\

		VNSvOutPortW(dwIoBase + MAC_REG_AIDATIM , wCounter);	\

	}

	VNSvOutPortW(dwIoBase + MAC_REG_AIDATIM, wCounter)



#define MACvWriteCRC16_128(dwIoBase, byRegOfs, wCRC)		\

	{							\

do {								\

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1);		\

	VNSvOutPortW(dwIoBase + byRegOfs, wCRC);		\

	VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0);		\

	}

} while (0)



#define MACvGPIOIn(dwIoBase, pbyValue)					\

	{								\

		VNSvInPortB(dwIoBase + MAC_REG_GPIOCTL1, pbyValue);     \

	}

	VNSvInPortB(dwIoBase + MAC_REG_GPIOCTL1, pbyValue)



#define MACvSetRFLE_LatchBase(dwIoBase)                                 \

	{								\

		MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_RFLEOPT); \

	}

	MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_RFLEOPT)



/*---------------------  Export Classes  ----------------------------*/

drivers/staging/vt6655/upc.h

+83 −82
Original line number Diff line number Diff line
@@ -41,32 +41,29 @@ 


#ifdef IO_MAP



#define VNSvInPortB(dwIOAddress, pbyData) {	\

#define VNSvInPortB(dwIOAddress, pbyData)	\

do {						\

	*(pbyData) = inb(dwIOAddress);		\

	}

} while (0)





#define VNSvInPortW(dwIOAddress, pwData) {	\

#define VNSvInPortW(dwIOAddress, pwData)	\

do {						\

	*(pwData) = inw(dwIOAddress);		\

	}

} while (0)



#define VNSvInPortD(dwIOAddress, pdwData) {	\

#define VNSvInPortD(dwIOAddress, pdwData)	\

do {						\

	*(pdwData) = inl(dwIOAddress);		\

	}



} while (0)



#define VNSvOutPortB(dwIOAddress, byData) {	\

		outb(byData, dwIOAddress);	\

	}

#define VNSvOutPortB(dwIOAddress, byData)	\

	outb(byData, dwIOAddress)



#define VNSvOutPortW(dwIOAddress, wData)	\

	outw(wData, dwIOAddress)



#define VNSvOutPortW(dwIOAddress, wData) {	\

		outw(wData, dwIOAddress);	\

	}



#define VNSvOutPortD(dwIOAddress, dwData) {	\

		outl(dwData, dwIOAddress);	\

	}

#define VNSvOutPortD(dwIOAddress, dwData)	\

	outl(dwData, dwIOAddress)



#else
@@ -75,38 +72,43 @@ 
//





#define VNSvInPortB(dwIOAddress, pbyData) {				\

		volatile unsigned char *pbyAddr = ((unsigned char *)(dwIOAddress)); \

#define VNSvInPortB(dwIOAddress, pbyData)				\

do {									\

	volatile unsigned char *pbyAddr = (unsigned char *)(dwIOAddress); \

	*(pbyData) = readb(pbyAddr);					\

	}

} while (0)





#define VNSvInPortW(dwIOAddress, pwData) {				\

		volatile unsigned short *pwAddr = ((unsigned short *)(dwIOAddress)); \

#define VNSvInPortW(dwIOAddress, pwData)				\

do {									\

	volatile unsigned short *pwAddr = (unsigned short *)(dwIOAddress); \

	*(pwData) = readw(pwAddr);					\

	}

} while (0)



#define VNSvInPortD(dwIOAddress, pdwData) {				\

		volatile unsigned long *pdwAddr = ((unsigned long *)(dwIOAddress)); \

#define VNSvInPortD(dwIOAddress, pdwData)				\

do {									\

	volatile unsigned long *pdwAddr = (unsigned long *)(dwIOAddress); \

	*(pdwData) = readl(pdwAddr);					\

	}

} while (0)





#define VNSvOutPortB(dwIOAddress, byData) {				\

		volatile unsigned char *pbyAddr = ((unsigned char *)(dwIOAddress)); \

#define VNSvOutPortB(dwIOAddress, byData)				\

do {									\

	volatile unsigned char *pbyAddr = (unsigned char *)(dwIOAddress); \

	writeb((unsigned char)byData, pbyAddr);				\

	}

} while (0)





#define VNSvOutPortW(dwIOAddress, wData) {				\

#define VNSvOutPortW(dwIOAddress, wData)				\

do {									\

	volatile unsigned short *pwAddr = ((unsigned short *)(dwIOAddress)); \

	writew((unsigned short)wData, pwAddr);				\

	}

} while (0)



#define VNSvOutPortD(dwIOAddress, dwData) {				\

		volatile unsigned long *pdwAddr = ((unsigned long *)(dwIOAddress)); \

#define VNSvOutPortD(dwIOAddress, dwData)				\

do {									\

	volatile unsigned long *pdwAddr = (unsigned long *)(dwIOAddress); \

	writel((unsigned long)dwData, pdwAddr);				\

	}

} while (0)



#endif
@@ -114,43 +116,42 @@ 
//

// ALWAYS IO-Mapped IO when in 16-bit/32-bit environment

//

#define PCBvInPortB(dwIOAddress, pbyData) {     \

#define PCBvInPortB(dwIOAddress, pbyData)	\

do {						\

	*(pbyData) = inb(dwIOAddress);		\

	}

} while (0)



#define PCBvInPortW(dwIOAddress, pwData) {      \

#define PCBvInPortW(dwIOAddress, pwData)	\

do {						\

	*(pwData) = inw(dwIOAddress);		\

	}

} while (0)



#define PCBvInPortD(dwIOAddress, pdwData) {     \

#define PCBvInPortD(dwIOAddress, pdwData)	\

do {						\

	*(pdwData) = inl(dwIOAddress);		\

	}



#define PCBvOutPortB(dwIOAddress, byData) {     \

		outb(byData, dwIOAddress);	\

	}

} while (0)



#define PCBvOutPortW(dwIOAddress, wData) {      \

		outw(wData, dwIOAddress);	\

	}

#define PCBvOutPortB(dwIOAddress, byData)	\

	outb(byData, dwIOAddress)



#define PCBvOutPortD(dwIOAddress, dwData) {     \

		outl(dwData, dwIOAddress);	\

	}

#define PCBvOutPortW(dwIOAddress, wData)	\

	outw(wData, dwIOAddress)



#define PCBvOutPortD(dwIOAddress, dwData)	\

	outl(dwData, dwIOAddress)



#define PCAvDelayByIO(uDelayUnit) {				\

#define PCAvDelayByIO(uDelayUnit)				\

do {								\

	unsigned char byData;					\

	unsigned long ii;					\

								\

	if (uDelayUnit <= 50) {					\

		udelay(uDelayUnit);				\

		}						\

		else {						\

	} else {						\

		for (ii = 0; ii < (uDelayUnit); ii++)		\

			byData = inb(0x61);			\

	}							\

	}

} while (0)





/*---------------------  Export Classes  ----------------------------*/

drivers/staging/vt6655/wctl.h

+7 −6
Original line number Diff line number Diff line
@@ -83,12 +83,13 @@ 
	((((PS802_11Header) pMACHeader)->wFrameCtl & TYPE_SUBTYPE_MASK) == TYPE_CTL_PSPOLL)





#define ADD_ONE_WITH_WRAP_AROUND(uVar, uModulo) {	\

#define ADD_ONE_WITH_WRAP_AROUND(uVar, uModulo)		\

do {							\

	if ((uVar) >= ((uModulo) - 1))			\

		(uVar) = 0;				\

	else						\

		(uVar)++;				\

	}

} while (0)





/*---------------------  Export Classes  ----------------------------*/

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